KSZ8851SNLI Micrel Inc, KSZ8851SNLI Datasheet - Page 79

• Manufacturer Part Number: KSZ8851SNLI
• Manufacturer: Micrel Inc

Specifications of KSZ8851SNLI

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Acronyms and Glossary
BIU
BPDU
CMOS
CRC
Cut-through Switch
DA
DMA
EEPROM
EISA
EMI
FCS
FID
IGMP
IPG
ISI
ISA
Jumbo Packet
MDI
August 2009
Micrel, Inc.
Bus Interface Unit
Bridge Protocol Data Unit
Complementary Metal Oxide Semiconductor
Cyclic Redundancy Check
Destination Address
Direct Memory Access
Electronically Erasable Programmable
Read-only Memory
Extended Industry Standard Architecture
Electro-Magnetic Interference
Frame Check Sequence
Frame or Filter ID
Internet Group Management Protocol
Inter-Packet Gap
Inter-Symbol Interference
Industry Standard Architecture
Medium Dependent Interface
79
The host interface function that performs code conversion,
buffering, and the like required for communications to and from a
network.
A packet containing ports, addresses, etc. to make sure data
being passed through a bridged network arrives at its proper
destination.
A common semiconductor manufacturing technique in which
positive and negative types of transistors are combined to form a
current gate that in turn forms an effective means of controlling
electrical current through a chip.
A common technique for detecting data transmission errors. CRC
for Ethernet is 32 bits long.
in the full packet (storing), then processing the packet to determine
where it needs to go, then forwarding it. A cut-through switch
simply reads in the first bit of an incoming packet and forwards the
packet. Cut-through switches do not store the packet.
The address to send packets.
A design in which memory on a chip is controlled independently of
the CPU.
A design in which memory on a chip can be erased by
exposing it to an electrical charge.
A bus architecture designed for PCs using 80x86 processors, or
an Intel 80386, 80486 or Pentium microprocessor. EISA buses
are 32 bits wide and support multiprocessing.
A naturally occurring phenomena when the electromagnetic field
of one device disrupts, impedes or degrades the electromagnetic
field of another device by coming into proximity with it. In computer
technology, computer devices are susceptible to EMI because
electromagnetic fields are a byproduct of passing electricity
through a wire. Data lines that have not been properly shielded
are susceptible to data corruption by EMI.
See CRC.
Specifies the frame identifier. Alternately is the filter identifier.
The protocol defined by RFC 1112 for IP multicast transmissions.
A time delay between successive data packets mandated by the
network standard for protocol reasons. In Ethernet, the medium
has to be "silent" (i.e., no data transfer) for a short period of time
before a node can consider the network idle and start to transmit.
IPG is used to correct timing differences between a transmitter
and receiver. During the IPG, no data is transferred, and
information in the gap can be discarded or additions inserted
without impact on data integrity.
affecting or interfering with each other.
A bus architecture used in the IBM PC/XT and PC/AT.
A packet larger than the standard Ethernet packet (1500 bytes).
Large packet sizes allow for more efficient use of bandwidth, lower
overhead, less processing, etc.
An Ethernet port connection that allows network hubs or switches
to connect to other hubs or switches without a null-modem, or
crossover, cable. MDI provides the standard interface to a
particular media (copper or fiber) and is therefore 'media
dependent.'
The disruption of transmitted code caused by adjacent pulses
A switch typically processes received packets by reading
KSZ8851SNL/SNLI
M9999-083109-2.0