ML610Q422-NNNTBZ03A7 Rohm Semiconductor, ML610Q422-NNNTBZ03A7 Datasheet - Page 345

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ML610Q422-NNNTBZ03A7

Manufacturer Part Number
ML610Q422-NNNTBZ03A7
Description
MCU 8BIT 32K FLASH 22CH 120-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q422-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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26.2.5
• DADM1, DADM0 (bits 1-0)
• DASN (bit 2)
Address: 0F0F3H
Access: R/W
Access size: 8 bits
Initial value: 00H
DSPMOD1 is a special register (SFR) to control the display mode of the LCD drivers.
Use DSPMOD1 to select a type of display register segment map and determine to use or unuse the programmable display
allocation function (display allocation RAM).
[Description of Bits]
Note:
When using the programmable display allocation, select type 3 for the display register segment map. Oki semiconductor
LCD Tool only generates table data can be used for the type 3.
DSPMOD1
Initial value
DADM1 and DADM0 are used to select a type of display register segment map. Two types are available; type 2, and
type 3 (type 1 is not available on ML610Q421/ML610Q422) . See section 26.2.9 and section 26.3.2.
The DASN bit is used to control the operation of the display allocation function.
Setting the DASN bit to “1” enables the display allocation function.
R/W
DADM1
DASN
0
1
0
1
Display Mode Register 1 (DSPMOD1)
Not use Programmable display allocation (initial value)
Use Programmable display allocation
DADM0
R/W
7
0
*
*
Display register segment map type 2 (initial value)
Display register segment map type 3
R/W
6
0
R/W
5
0
Description
R/W
4
0
26 – 14
Description
R/W
3
0
ML610Q421/ML610Q422 User’s Manual
DASN
R/W
2
0
DADM1
R/W
Chapter 26 LCD Drivers
1
0
DADM0
R/W
0
0

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