MPC9773AE IDT, Integrated Device Technology Inc, MPC9773AE Datasheet - Page 10

no-image

MPC9773AE

Manufacturer Part Number
MPC9773AE
Description
IC PLL CLK GEN 1:12 3.3V 52-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Clock Generatorr
Datasheet

Specifications of MPC9773AE

Pll
Yes with Bypass
Input
LVCMOS, LVPECL
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
3:12
Differential - Input:output
Yes/No
Frequency - Max
242.5MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
52-LQFP
Frequency-max
242.5MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC9773AE
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
MPC9773AER2
Manufacturer:
IDT
Quantity:
1 059
Part Number:
MPC9773AER2
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
MPC9773AER2
Manufacturer:
IDT
Quantity:
20 000
IDT™ 3.3 V 1:12 LVCMOS PLL Clock Generator
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC9773
3.3 V 1:12 LVCMOS PLL Clock Generator
SYNC Output Description
QSYNC. In configurations for which the output frequency
relationships are not integer multiples of each other, QSYNC
provides a signal for system synchronization purposes. The
MPC9773 monitors the relationship between the A bank and
the B bank of outputs. The QSYNC output is asserted (logic
low) one period in duration and one period prior to the
MPC9773
10
The MPC9773 has a system synchronization pulse output
QA(÷12)
QSYNC
QSYNC
QSYNC
QSYNC
QSYNC
QSYNC
QSYNC
QC(÷2)
QC(÷6)
QC(÷2)
QC(÷8)
QC(÷2)
QA(÷6)
QA(÷4)
QA(÷8)
QA(÷6)
f
VCO
QC
QC
QA
QA
Figure 6. QSYNC Timing Diagram
1:1 Mode
2:1 Mode
3:1 Mode
3:2 Mode
4:1 Mode
4:3 Mode
6:1 Mode
10
coincident rising edges of the QA and QC outputs. The
duration and the placement of the pulse is dependent on QA
and QC output frequencies: the QSYNC pulse width is equal
to the period of the higher of the QA and QC output
frequencies.
QSYNC output. The QSYNC output is defined for all possible
combinations of the bank A and bank C outputs.
Figure 6
shows various waveforms for the
Advanced Clock Drivers Device Data
Freescale Semiconductor
NETCOM
MPC9773

Related parts for MPC9773AE