ISL12020MIRZ Intersil, ISL12020MIRZ Datasheet - Page 22

IC RTC/CALENDAR TEMP SNSR 20-DFN

ISL12020MIRZ

Manufacturer Part Number
ISL12020MIRZ
Description
IC RTC/CALENDAR TEMP SNSR 20-DFN
Manufacturer
Intersil
Type
Clock/Calendarr
Datasheet

Specifications of ISL12020MIRZ

Memory Size
1K (128 x 8)
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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After these registers are set, an alarm will be generated
when the RTC advances to exactly 11:30 a.m. on
January 1 (after seconds changes from 59 to 00) by
setting the ALM bit in the status register to “1” and also
bringing the IRQ/F
Example 2
• Pulsed interrupt once per minute (IM = “1”)
• Interrupts at one minute intervals when the seconds
• Set Alarm registers as follows:
Once the registers are set, the following waveform will be
seen at IRQ/F
Note that the status register ALM bit will be set each time
the alarm is triggered, but does not need to be read or
cleared.
Time Stamp V
(TSV2B)
The TSV2B Register bytes are identical to the RTC
register bytes, except they do not extend beyond the
Month. The Time Stamp captures the FIRST V
Battery Voltage transition time, and will not update upon
subsequent events, until cleared (only the first event is
captured before clearing). Set CLRTS = 1 to clear this
register (Add 09h, PWR_V
Note that the time stamp registers are cleared to all “0”,
including the month and day, which is different from the
RTC and alarm registers (those registers default to 01h).
This is the indicator that no time stamping has occurred
since the last clear or initial power-up. Once a time
stamp occurs, there will be a non-zero time stamp.
REGISTER
register is at 30s.
ALARM
DWA0
MNA0
MOA0
HRA0
SCA0
DTA0
RTC AND ALARM REGISTERS ARE BOTH “30s”
FIGURE 14. IRQ/F
7 6 5 4 3 2 1 0 HEX
1 0 1 1 0 0 0 0 B0h Seconds set to 30,
0 0 0 0 0 0 0 0 00h Hours disabled
0 0 0 0 0 0 0 0 00h Minutes disabled
0 0 0 0 0 0 0 0 00h Date disabled
0 0 0 0 0 0 0 0 00h Month disabled
0 0 0 0 0 0 0 0 00h Day of week disabled
OUT
:
DD
OUT
to Battery Registers
BIT
output low.
22
DD
60s
register).
OUT
WAVEFORM
enabled
DESCRIPTION
DD
to
ISL12020M
Time Stamp Battery to V
(TSB2V)
The Time Stamp Battery to V
identical to the RTC register bytes, except they do not
extend beyond Month. The Time Stamp captures the
LAST transition of V
series of power-up/down events is retained). Set
CLRTS = 1 to clear this register (Add 09h, PWR_V
register).
DST Control Registers (DSTCR)
8 bytes of control registers have been assigned for the
Daylight Savings Time (DST) functions. DST beginning
(set Forward) time is controlled by the registers
DstMoFd, DstDwFd, DstDtFd, and DstHrFd. DST ending
time (set Backward or Reverse) is controlled by DstMoRv,
DstDwRv, DstDtRv and DstHrRv.
Tables 20 and 21 describe the structure and functions of
the DSTCR.
DST FORWARD REGISTERS (20H TO 23H)
DST forward is controlled by the following DST Registers:
DST Enable
DSTE is the DST Enabling Bit located in Bit 7 of register
20h (DstMoFdxx). Set DSTE = 1 will enable the DSTE
function. Upon powering up for the first time (including
battery), the DSTE bit defaults to “0”. When DSTE is set
to “1” the RTC time must be at least one hour before the
scheduled DST time change for the correction to take
place. When DSTE is set to “0”, the DSTADJ bit in the
Status Register automatically resets to “0”.
DST Month Forward
DstMoFd sets the Month that DST starts. The format is
the same as for the RTC register month, from 1 to 12.
The default value for the DST begin month is 00h.
DST Day/Week Forward
DstDwFd contains both the Day of the Week and the
Week of the Month data for DST Forward control. DST
can be controlled either by actual date or by setting both
the Week of the month and the Day of the Week.
DstDwFdE sets the priority of the Day/Week over the
Date. For DstDwFdE = 1, Day/Week is the priority. You
must have the correct Day of Week entered in the RTC
registers for the Day/Week correction to work properly.
• Bits 0, 1, 2 contain the Day of the week information,
which sets the Day of the Week that DST starts. Note
that Day of the week counts from 0 to 6, like the RTC
registers. The default for the DST Forward Day of the
Week is 00h (normally Sunday).
BAT
to V
DD
DD
(only the last event of a
DD
Register bytes are
Registers
February 11, 2010
DD
FN6667.4

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