LTC2498IUHF#PBF Linear Technology, LTC2498IUHF#PBF Datasheet - Page 5

• Manufacturer Part Number: LTC2498IUHF#PBF
• Description: IC ADC 24BIT 16CH 38-QFN
• Manufacturer: Linear Technology

Specifications of LTC2498IUHF#PBF

• Number Of Bits: 24
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 480µW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 38-WFQFN, Exposed Pad
• Number Of Elements: 1
• Resolution: 24Bit
• Architecture: Delta-Sigma
• Sample Rate: 0.008KSPS
• Input Polarity: Bipolar
• Input Type: Voltage
• Rated Input Volt: ±2.75V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Integral Nonlinearity Error: 10ppm of Vref
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 38
• Package Type: QFN EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Digital inputs anD Digital outputs
full operating temperature range, otherwise specifications are at T
SYMBOL
f
t
t
t
t
f
D
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to any Absolute Maximum
Rating condition for extended periods may affect device reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: V
where IN
Note 4: Use internal conversion clock or external conversion clock source
with f
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: 50Hz mode (internal oscillator) or f
oscillator).
Note 8: 60Hz mode (internal oscillator) or f
oscillator).
Note 9: Simultaneous 50Hz/60Hz mode (internal oscillator) or f
280kHz ±2% (external oscillator).
EOSC
HEO
LEO
CONV_1
CONV_2
ISCK
ESCK
LESCK
HESCK
DOUT_ISCK
DOUT_ESCK
1
2
3
4
KQMAX
KQMIN
5
6
7
8
ISCK
V
V
REFCM
IN
EOSC
= IN
+
CC
and IN
= 307.2kHz unless other wise specified.
= V
+
= 2.7V to 5.5V unless otherwise specified.
– IN
PARAMETER
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time for 1x Speed Mode
Conversion Time for 2x Speed Mode
Internal SCK Frequency
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK LOW Period
External SCK High Period
Internal SCK 32-Bit Data Output Time
External SCK 32-Bit Data Output Time
CS↓ to SDO Low
CS↑ to SDO Hi-Z
CS↓ to SCK↑
CS↓ to SCK↑
SCK↓ to SDO Valid
SDO Hold After SCK↓
SCK Set-Up Before CS↓
SCK Hold After CS↓
SDI Setup Before SCK↑
SDI Hold After SCK↑
REF
–
–
/2, F
, V
are the selected input channels.
IN(CM)
S
= 0.5V
= (IN
REF
+
– IN
–
)/2,
EOSC
EOSC
= 256kHz ±2% (external
= 307.2kHz ±2% (external
CONDITIONS
(Note 16)
50Hz Mode
60Hz Mode
Simultaneous 50/60Hz Mode
External Oscillator
50Hz Mode
60Hz Mode
Simultaneous 50/60Hz Mode
External Oscillator
Internal Oscillator (Note 10)
External Oscillator (Notes 10, 11)
(Note 10)
(Note 10)
(Note 10)
(Note 10)
Internal Oscillator
External Oscillator
(Note 10)
Internal SCK Mode
External SCK Mode
(Note 5)
(Note 5)
(Note 5)
EOSC
=
A
= 25°C. (Note 3)
Note 10: The SCK can be configured in external SCK mode or internal SCK
mode. In external SCK mode, the SCK pin is used as a digital input and the
driving clock is f
digital output and the output clock signal during the data output is f
Note 11: The external oscillator is connected to the f
oscillator frequency, f
Note 12: The converter uses its internal oscillator.
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
Note 15: The converter is in external SCK mode of operation such that the
SCK pin is used as a digital input. The frequency of the clock signal driving
SCK during the data output is f
Note 16: Refer to Applications Information section for performance vs
data rate graphs.
Note 17: The converter is in internal SCK mode of operation such that the
SCK pin is used as a digital output.
Note 18: For V
The
l
CC
ESCK
denotes the specifications which apply over the
< 3V, V
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
. In the internal SCK mode, the SCK pin is used as a
EOSC
IH
0.125
0.125
157.2
144.1
MIN
78.7
65.6
72.2
0.81
131
125
125
100
100
, is expressed in kHz.
10
45
50
15
50
is 2.5V for Pin f
0
0
0
ESCK
41036/f
20556/f
256/f
32/f
and is expressed in Hz.
ESCK
EOSC
f
160.3
133.6
146.9
EOSC
EOSC
EOSC
80.3
66.9
73.6
38.4
0.83
TYP
O
.
(in kHz)
(in kHz)
/8
(in kHz)
(in kHz)
LTC2498
O
pin. The external
163.5
136.3
149.9
4000
4000
MAX
81.9
68.2
75.1
0.85
200
200
200
200
50
50
55
50
ISCK
UNITS
2498fe

kHz
kHz
kHz
kHz
.
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%