AD7703ARZ Analog Devices Inc, AD7703ARZ Datasheet - Page 7

• Manufacturer Part Number: AD7703ARZ
• Description: IC ADC 20BIT LC2MOS 20-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7703ARZ

• Data Interface: Serial
• Number Of Bits: 20
• Sampling Rate (per Second): 4k
• Number Of Converters: 1
• Power Dissipation (max): 37mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Resolution (bits): 20bit
• Sampling Rate: 4kSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Analog: ± 4.5V To ± 5.5V
• Supply Current: 2.7mA
• Number Of Elements: 1
• Resolution: 20Bit
• Architecture: Delta-Sigma
• Sample Rate: 16KSPS
• Input Polarity: Unipolar/Bipolar
• Input Type: Voltage
• Rated Input Volt: 2.5/±2.5V
• Differential Input: No
• Power Supply Requirement: Dual
• Single Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (typ): ±5V
• Dual Supply Voltage (min): ±4.5V
• Dual Supply Voltage (max): ±5.5V
• Power Dissipation: 37mW
• Differential Linearity Error: ±0.5LSB(Typ)
• Integral Nonlinearity Error: ±0.003%FSR
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC W
• Input Signal Type: Single-Ended
• Package: 20SOIC W
• Number Of Analog Inputs: 1
• Digital Interface Type: Serial (SPI)
• Polarity Of Input Voltage: Unipolar|Bipolar
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

GENERAL DESCRIPTION
The AD7703 is a 20-bit A/D converter with on-chip digital
filtering, intended for the measurement of wide dynamic range,
low frequency signals such as those representing chemical,
physical, or biological processes. It contains a charge-balancing
( - ) ADC, calibration microcontroller with on-chip static
RAM, clock oscillator, and serial communications port.
The analog input signal to the AD7703 is continuously sampled
at a rate determined by the frequency of the master clock, CLKIN.
A charge-balancing A/D converter ( - modulator) converts
the sampled signal into a digital pulse train whose duty cycle
contains the digital information. A six-pole Gaussian digital
low-pass filter processes the output of the - modulator and
updates the 20-bit output register at a 4 kHz rate. The output
data can be read from the serial port randomly or periodically at
any rate up to 4 kHz.
The AD7703 can perform self-calibration using the on-chip
calibration microcontroller and SRAM to store calibration
parameters. A calibration cycle may be initiated at any time
using the CAL control input.
Other system components may also be included in the calibra-
tion loop to remove offset and gain errors in the input channel.
For battery operation, the AD7703 also offers a standby mode
that reduces idle power consumption to typically 10 µW.
THEORY OF OPERATION
The general block diagram of a - ADC is shown in Figure 8.
It contains the following elements:
1. A sample-hold amplifier
2. A differential amplifier or subtracter
3. An analog low-pass filter
REV. E
ANALOG
SUPPLY
+5V
CALIBRATE
Figure 7. Typical System Connection Diagram
ANALOG
GROUND
ANALOG
ANALOG
SELECT
SUPPLY
RANGE
INPUT
10 F
–5V
REFERENCE
10 F
VOLTAGE
0.1 F
0.1 F
2.5V
AV
V
BP/UP
CAL
A
AGND
AV
REF
IN
DD
AD7703
SS
CLKOUT
SLEEP
SDATA
MODE
CLKIN
DRDY
SCLK
DGND
DV
DV
SC1
SC2
CS
DD
SS
0.1 F
DATA READY
READ
(TRANSMIT)
SERIAL CLOCK
SERIAL DATA
0.1 F
–7–
4. A 1-bit A/D converter (comparator)
5. A 1-bit DAC
6. A digital low-pass filter
In operation, the analog signal sample is fed to the subtracter,
along with the output of the 1-bit DAC. The filtered difference
signal is fed to the comparator, whose output samples the differ-
ence signal at a frequency many times that of the analog signal
sampling frequency (oversampling).
Oversampling is fundamental to the operation of - ADCs.
Using the quantization noise formula for an ADC
a 1-bit ADC or comparator yields an SNR of 7.78 dB.
The AD7703 samples the input signal at 16 kHz, which spreads
the quantization noise from 0 kHz to 8 kHz. Since the specified
analog input bandwidth of the AD7703 is only 0 Hz to 10 Hz, the
noise energy in this bandwidth would be only 1/800 of the total
quantization noise, even if the noise energy were spread evenly
throughout the spectrum. It is reduced still further by analog
filtering in the modulator loop, which shapes the quantization
noise spectrum to move most of the noise energy to frequencies
above 10 Hz. The SNR performance in the 0 Hz to 10 Hz range
is conditioned to the 20-bit level in this fashion.
The output of the comparator provides the digital input for the
1-bit DAC, so the system functions as a negative feedback loop
that minimizes the difference signal. The digital data that repre-
sents the analog input voltage is in the duty cycle of the pulse train
appearing at the output of the comparator. It can be retrieved as
a parallel binary data-word using a digital filter.
low-pass filter. A simple example of a first-order, - ADC is
shown in Figure 8. This contains only a first-order, low-pass
filter or integrator. It also illustrates the derivation of the alter-
native name for these devices: charge-balancing ADCs.
The AD7703 uses a second-order, - modulator and a sophis-
ticated digital filter that provides a rolling average of the sampled
output. After power-up or if there is a step change in the input
voltage, there is a settling time that must elapse before valid
data is obtained.
- ADCs are generally described by the order of the analog
S/H AMP
SNR = (6.02 ¥ number of bits + 1.76) dB
Figure 8. General - ADC
LOW-PASS
ANALOG
FILTER
DAC
COMPARATOR
AD7703
DIGITAL DATA
DIGITAL
FILTER