PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 355

• Manufacturer Part Number: PIC18F86K90-I/PT
• Description: 64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.1.3
The Enhanced USART module supports the automatic
detection and calibration of baud rate. This feature is
active only in Asynchronous mode and while the WUE
bit is clear.
The automatic baud rate measurement sequence
(Figure 22-1) begins whenever a Start bit is received
and the ABDEN bit is set. The calculation is
self-averaging.
In the Auto-Baud Rate Detect (ABD) mode, the clock to
the BRG is reversed. Rather than the BRG clocking the
incoming RXx signal, the RXx signal is timing the BRG.
In ABD mode, the internal Baud Rate Generator is
used as a counter to time the bit period of the incoming
serial byte stream.
Once the ABDEN bit is set, the state machine will clear
the BRG and look for a Start bit. The Auto-Baud Rate
Detect must receive a byte with the value, 55h (ASCII
“U”, which is also the LIN/J2602 bus Sync character), in
order to calculate the proper bit rate. The measurement
is taken over both a low and a high bit time in order to
minimize any effects caused by asymmetry of the incom-
ing signal. After a Start bit, the SPBRGx begins counting
up, using the preselected clock source on the first rising
edge of RXx. After eight bits on the RXx pin or the fifth
rising edge, an accumulated value totalling the proper
BRG period is left in the SPBRGHx:SPBRGx register
pair. Once the 5th edge is seen (this should correspond
to the Stop bit), the ABDEN bit is automatically cleared.
If a rollover of the BRG occurs (an overflow from FFFFh
to 0000h), the event is trapped by the ABDOVF status
bit (BAUDCONx<7>). It is set in hardware by BRG roll-
overs and can be set or cleared by the user in software.
ABD mode remains active after rollover events and the
ABDEN bit remains set (Figure 22-2).
While calibrating the baud rate period, the BRG
registers are clocked at 1/8th the preconfigured clock
rate. Note that the BRG clock can be configured by the
BRG16 and BRGH bits. The BRG16 bit must be set to
use both SPBRG1 and SPBRGH1 as a 16-bit counter.
This allows the user to verify that no carry occurred for
8-bit modes by checking for 00h in the SPBRGHx
register. Refer to Table 22-4 for counter clock rates to
the BRG.
 2010 Microchip Technology Inc.
AUTO-BAUD RATE DETECT
Preliminary
PIC18F87K90 FAMILY
While the ABD sequence takes place, the EUSART
state machine is held in Idle. The RCxIF interrupt is set
once the fifth rising edge on RXx is detected. The value
in the RCREGx needs to be read to clear the RCxIF
interrupt. The contents of RCREGx should be
discarded.
TABLE 22-4:
22.1.3.1
Since the BRG clock is reversed during ABD acquisi-
tion, the EUSART transmitter cannot be used during
ABD. This means that whenever the ABDEN bit is set,
TXREGx cannot be written to. Users should also
ensure that ABDEN does not become set during a
transmit sequence. Failing to do this may result in
unpredictable EUSART operation.
BRG16
Note 1: If the WUE bit is set with the ABDEN bit,
0
0
1
1
2: It is up to the user to determine that the
3: To maximize baud rate range, it is
BRGH
Auto-Baud Rate Detection will occur on
the byte following the Break character.
incoming character baud rate is within the
range of the selected BRG clock source.
Some combinations of oscillator frequency
and EUSART baud rates are not possible
due to bit error rates. Overall system tim-
ing and communication baud rates must
be taken into consideration when using the
Auto-Baud Rate Detection feature.
recommended
(BAUDCONx<3>) bit if the auto-baud
feature is used.
ABD and EUSART Transmission
0
1
0
1
BRG COUNTER
CLOCK RATES
BRG Counter Clock
to
F
F
F
F
OSC
OSC
OSC
OSC
set
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the
BRG16