PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 480

• Manufacturer Part Number: PIC18F86K90-I/PT
• Description: 64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K90 FAMILY
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39957B-page 480
Q Cycle Activity:
After Interrupt
operation
Decode
PC
W
BSR
STATUS
GIE/GIEH, PEIE/GIEL
No
Q1
operation
operation
Return from Interrupt
RETFIE {s}
s  [0,1]
(TOS)  PC,
1  GIE/GIEH or PEIE/GIEL;
if s = 1 ,
(WS)  W,
(STATUSS)  STATUS,
(BSRS)  BSR,
PCLATU, PCLATH are unchanged
GIE/GIEH, PEIE/GIEL.
Return from interrupt. Stack is popped
and Top-of-Stack (TOS) is loaded into
the PC. Interrupts are enabled by
setting either the high or low-priority
global interrupt enable bit. If ‘s’ = 1 , the
contents of the shadow registers WS,
STATUSS and BSRS are loaded into
their corresponding registers W,
STATUS and BSR. If ‘s’ = 0 , no update
of these registers occurs.
1
2
RETFIE
0000
No
No
Q2
1
0000
operation
operation
=
=
=
=
=
No
No
Q3
TOS
WS
BSRS
STATUSS
1
0001
Set GIEH or
from stack
operation
POP PC
GIEL
No
Q4
000s
Preliminary
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
TABLE
Q Cycle Activity:
:
:
:
CALL TABLE ; W contains table
ADDWF PCL
RETLW k0
RETLW k1
RETLW kn
Before Instruction
After Instruction
operation
Decode
W
W
No
Q1
; offset value
; W now has
; table value
; W = offset
; Begin table
;
; End of table
=
=
operation
Return Literal to W
RETLW k
0  k  255
k  W,
(TOS)  PC,
PCLATU, PCLATH are unchanged
None
W is loaded with the 8-bit literal ‘k’. The
program counter is loaded from the top
of the stack (the return address). The
high address latch (PCLATH) remains
unchanged.
1
2
literal ‘k’
Read
0000
No
Q2
07h
value of kn
 2010 Microchip Technology Inc.
1100
operation
Process
Data
No
Q3
kkkk
from stack,
write to W
operation
POP PC
No
Q4
kkkk