PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 41

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PIC18F86K90-I/PT

Manufacturer Part Number
PIC18F86K90-I/PT
Description
64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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3.2
The OSCCON register (Register 3-1) controls the main
aspects of the device clock’s operation. It selects the
oscillator type to be used, which of the power-managed
modes to invoke and the output frequency of the
INTOSC source. It also provides status on the oscillators.
REGISTER 3-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-4
bit 3
Note 1:
IDLEN
R/W-0
2:
3:
4:
5:
Control Registers
Reset state depends on the state of the IESO Configuration bit (CONFIG1H<7>).
Modifying these bits will cause an immediate clock frequency switch if the internal oscillator is providing
the device clocks.
Source selected by the INTSRC bit (OSCTUNE<7>).
Modifying these bits will cause an immediate clock source switch.
INTSRC = OSCTUNE<7> and MFIOSEL = OSCCON2<0>.
IDLEN: Idle Enable bit
1 = Device enters an Idle mode when a SLEEP instruction is executed
0 = Device enters Sleep mode when a SLEEP instruction is executed
IRCF<2:0>: Internal Oscillator Frequency Select bits
111 = HF-INTOSC output frequency used (16 MHz)
110 = HF-INTOSC/2 output frequency used (8 MHz, default)
101 = HF-INTOSC/4 output frequency used (4 MHz)
100 = HF-INTOSC/8 output frequency used (2 MHz)
011 = HF-INTOSC/16 output frequency used (1 MHz)
If INTSRC = 0 and MFIOSEL = 0:
010 = HF-INTOSC/32 output frequency used (500 kHz)
001 = HF-INTOSC/64 output frequency used (250 kHz)
000 = LF-INTOSC output frequency used (31.25 kHz)
If INTSRC = 1 and MFIOSEL = 0:
010 = HF-INTOSC/32 output frequency used (500 kHz)
001 = HF-INTOSC/64 output frequency used (250 kHz)
000 = HF-INTOSC/512 output frequency used (31.25 kHz)
If INTSRC = 0 and MFIOSEL = 1:
010 = MF-INTOSC output frequency used (500 kHz)
001 = MF-INTOSC/2 output frequency used (250 kHz)
000 = LF-INTOSC output frequency used (31.25 kHz)
If INTSRC = 1 and MFIOSEL = 1:
010 = MF-INTOSC output frequency used (500 kHz)
001 = MF-INTOSC/2 output frequency used (250 kHz)
000 = MF-INTOSC/16 output frequency used (31.25 kHz)
OSTS: Oscillator Start-up Timer Time-out Status bit
1 = Oscillator Start-up Timer (OST) time-out has expired: primary oscillator is running, as defined by
0 = Oscillator Start-up Timer (OST) time-out is running: primary oscillator is not ready, device is running
IRCF2
R/W-1
OSC<3:0>
from an internal oscillator (HF-INTOSC, MF-INTOSC or LF-INTOSC)
OSCCON: OSCILLATOR CONTROL REGISTER
(2)
W = Writable bit
‘1’ = Bit is set
IRCF1
R/W-1
(2)
IRCF0
R/W-0
(3,5)
(3,5)
(3,5)
(3,5)
Preliminary
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K90 FAMILY
OSTS
The OSCTUNE register (Register 3-3) controls the
tuning and operation of the internal oscillator block. It also
implements the PLLEN bit which controls the operation of
the Phase Locked Loop (PLL) (see Section 3.5.2 “PLL
Frequency Multiplier”).
R
(1)
(1)
(2)
HFIOFS
(1)
R-0
x = Bit is unknown
SCS1
R/W-0
(4)
DS39957B-page 41
SCS0
R/W-0
(4)
bit 0

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