AD9717BCPZ Analog Devices Inc, AD9717BCPZ Datasheet - Page 11
![IC DAC DUAL 14BIT LO PWR 40LFCSP](/photos/6/50/65062/505-40-lfcsp_sml.jpg)
AD9717BCPZ
Manufacturer Part Number
AD9717BCPZ
Description
IC DAC DUAL 14BIT LO PWR 40LFCSP
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet
1.AD9717BCPZ.pdf
(80 pages)
Specifications of AD9717BCPZ
Data Interface
Serial
Number Of Bits
14
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
86mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-LFCSP
Resolution (bits)
14bit
Sampling Rate
125MSPS
Input Channel Type
Parallel, Serial
Supply Current
11mA
Digital Ic Case Style
CSP
No. Of Pins
40
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9717BCPZ
Manufacturer:
ADI
Quantity:
172
Part Number:
AD9717BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Pin No.
31
32
33
34
35
36
37
38
39
40
41 (EPAD)
Mnemonic
CMLI
FSADJQ/AUXQ
FSADJI/AUXI
REFIO
RESET/PINMD
SCLK/CLKMD
SDIO/FORMAT
CS/PWRDN
DB7 (MSB)
DB6
Exposed Pad
(EPAD)
Description
I DAC Output Common-Mode Level. When the internal on chip (IR
on-chip IR
disabled, this pin is the common-mode load for I DAC and must be connected to AVSS through a resistor
(see the Using the Internal Termination Resistors section). The recommended value for this external resistor
is 0 Ω.
Full-Scale Current Output Adjust (FSADJQ). When the internal on chip (QR
scale current output adjust for Q DAC and must be connected to AVSS through a resistor (see the Theory of
Operation section). The nominal value for this external resistor is 16 kΩ for a 2 mA output current.
Auxiliary Q DAC Output (AUXQ). When the internal on chip (QR
output.
Full-Scale Current Output Adjust (FSADJI). When the internal on chip (IR
current output adjust for I DAC and must be connected to AVSS through a resistor (see the Theory of
Operation section). The nominal value for this external resistor is 16 kΩ for a 2 mA output current.
Auxiliary I DAC Output (AUXI). When the internal on chip (IR
output.
Reference Input/Output. Serves as a reference input when the internal reference is disabled. Provides a 1.0 V
reference output when in internal reference mode (a 0.1 μF capacitor to AVSS is required).
This pin defines the operation mode of the part. A logic low (pull-down to DVSS) sets the part in SPI mode.
Pulse RESET high to reset the SPI registers to their default values.
A logic high (pull-up to DVDDIO) puts the device into pin mode (PINMD).
Clock Input for Serial Port (SCLK). In SPI mode, this pin is the clock input for the serial port.
Clock Mode (CLKMD). In pin mode, CLKMD determines the phase of the internal retiming clock. When
DCLKIO = CLKIN, tie it to 0. When DCLKIO ≠ CLKIN, pulse 0 to 1 to edge trigger the internal retimer (see the
Retimer section).
Format Pin (FORMAT). In pin mode, FORMAT determines the data format of digital data. A logic low (pull-
down to DVSS) selects the binary input data format. A logic high (pull-up to DVDDIO) selects the two
complement input data format.
Active Low Chip Select (CS). In SPI mode, this pin serves as the active low chip select. In pin mode, a logic
high (pull-up to DVDDIO) powers down the device, except for the SPI port.
Power-Down (PWRDN). In pin mode, PWRDN powers down the device except for the SPI port.
Digital Input (MSB).
Digital Input.
The exposed pad is connected to AVSS and should be soldered to the ground plane. Exposed metal at the
package corners is connected to this pad.
Serial Port Input/Output (SDIO). In SPI mode, this pin is the bidirectional data line for serial port.
CML
resistor. It is recommended to leave this pin unconnected. When the internal on chip (IR
Rev. A | Page 11 of 80
AD9714/AD9715/AD9716/AD9717
SET
) is enabled, this pin is the auxiliary I DAC
SET
) is enabled, this pin is the auxiliary Q DAC
CML
) is enabled, this pin is connected to the
SET
SET
) is disabled, this pin is full-scale
) is disabled, this pin is the full-
CML
) is