PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 63

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

Commands to VIP_n (CMD_n, n = 0 ... 2)
Initialization and control information for each VIP is sent by DELIC in the following
sequence every 125 µs via the IOM-2000 CMD line (32 CMD_n bits per VIP_n):
Note: All bits are programmed in VIP Command register (VIPCMR0..2).
Commands to VIP_n, Channel_m (CMD_n_m, m = 0 ... 7)
Initialization and control information for each VIP channel is sent by DELIC in the
following sequence every 125 µs via the IOM-2000 CMD line (32 CMD_n_m bits per
VIP_n Channel_m):
Note: All bits except WR_ST, SMINI(2:0) and MSYNC are programmed in TRANSIU
CMD_n_m
Data Sheet
CMD_n
Initialization Channel Command register (TICCR);
bits WR_ST, SMINI(2:0) and MSYNC reside in the TRANSIU Tx data RAM.
31
23
15
7
31
23
15
7
x
x
x
FIL
x
AAC(1:0)
DELCH(2:0)
MODE(2:0)
x
x
x
DHEN
SMINI(2:0)
x
x
x
x
BBC(1:0)
EXREF
x
x
x
46
MOSEL(1:0)
x
RD_n
x
x
PDOWN LOOP TX_EN PLLINT
MSYNC
REFSEL(2:0)
PLLPPS
OWIN(2:0)
x
x
WR_ST
EXLP
Interface Description
SH_FSC
PLLS
x
x
RD
PEB 20570
PEB 20571
2003-07-31
24
16
8
0
24
16
8
DELRE
0
WR_n
MF_EN
WR
PD
x
x