EMC6D102-CZC-TR Standard Microsystems (SMSC), EMC6D102-CZC-TR Datasheet - Page 45

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EMC6D102-CZC-TR

Manufacturer Part Number
EMC6D102-CZC-TR
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of EMC6D102-CZC-TR

Operating Current
3mA
Operating Temperature Classification
Commercial
Package Type
SSOP
Lead Free Status / Rohs Status
Compliant
Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features
Datasheet
Chapter 7 Register Set
SMSC EMC6D102
Addr
Reg
1Dh
1Eh
1Fh
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
3Eh
3Fh
4Ah
4Bh
4Ch
4Dh
4Eh
4Fh
10h
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h
30h
31h
32h
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
50h
51h
52h
Note 7.1
Note 7.1
Note 7.1
Note 7.2
Note 7.3
Note 7.3
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R-C
R-C
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Remote Diode 1 Temp Reading
Remote Diode 2 Temp Reading
Definition for the Lock and Start columns:
Yes = Register is made read-only when the related bit is set; No = Register is not made read-only
when the related bit is set.
Remote Diode 1 High Temp
Remote Diode 1 Low Temp
Remote Diode 2 Low Temp
PWM1 Current Duty Cycle
PWM2 Current Duty Cycle
PWM3 Current Duty Cycle
Interrupt Status Register 1
Interrupt Status Register 2
Offset Register Ambient
Internal Temp Reading
SMSC Test Register
Internal High Temp
Version / Stepping
Internal Low Temp
Offset Register 2
Offset Register 1
Ready/Lock/Start
Vccp High Limit
2.5V High Limit
Vccp Low Limit
VCC High Limit
+2.5V Reading
2.5V Low Limit
VCC Low Limit
12V High Limit
+12V Reading
12V Low Limit
Vccp Reading
VCC Reading
5V High Limit
+5V Reading
5V Low Limit
Company ID
Tach1 MSB
Tach2 MSB
Tach3 MSB
Tach4 MSB
Reg Name
Tach1 LSB
Tach2 LSB
Tach3 LSB
Tach4 LSB
VID0-4
VER3
ERR2
MSb
Bit 7
RES
INT2
RES
Table 7.1 Register Summary
15
15
15
15
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
VER2
ERR1
DATASHEET
Bit 6
RES
RES
D2
14
14
14
14
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
TACH4
VER1
Bit 5
RES
AMB
RES
13
13
13
13
45
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
TACH3
VER0
Bit 4
VID4
RES
12
12
12
12
D1
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
OVRID
TACH2
STP3
VID3
Bit 3
5V
11
11
11
11
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
READY
TACH1
STP2
Bit 2
VCC
VID2
10
10
10
10
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
LOCK
STP1
Bit 1
Vccp
VID1
RES
1
1
1
1
1
1
1
1
1
1
1
1
1
9
1
9
1
9
1
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
START
STP0
Bit 0
LSb
2.5V
VID0
12V
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
8
0
8
0
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Revision 0.4 (09-25-07)
Default
Value
5Ch
FFh
FFh
FFh
FFh
FFh
00h
00h
00h
00h
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
65h
00h
00h
00h
N/A
00h
00h
00h
00h
00h
81h
7Fh
81h
7Fh
81h
Note 7.1
Note 7.1
Note 7.1
Note 7.2
Lock
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Start
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No

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