EMC6D102-CZC-TR Standard Microsystems (SMSC), EMC6D102-CZC-TR Datasheet - Page 58

• Manufacturer Part Number: EMC6D102-CZC-TR
• Manufacturer: Standard Microsystems (SMSC)

Specifications of EMC6D102-CZC-TR

• Operating Current: 3mA
• Operating Temperature Classification: Commercial
• Package Type: SSOP
• Lead Free Status / Rohs Status: Compliant

Revision 0.4 (09-25-07)
7.2.15
Register
Address
5Ah
5Bh
54h
55h
56h
57h
58h
59h
TEMPERATURE
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
bit will be set automatically by the EMC6D102 in the Interrupt Status Register 1 (41h). For example,
if the temperature reading from the Remote1- and Remote1+ inputs exceeds the Remote Diode 1 High
Temp register limit setting, Bit[4] D1 of the Interrupt Status Register 1 will be set. The temperature limits
in these registers are represented as 8 bit, 2’s complement, signed numbers in Celsius, as shown
below in
Registers 54-5Bh: Fan Tachometer Low Limit
Setting the Lock bit has no effect on these registers.
The Fan Tachometer Low Limit registers indicate the tachometer reading under which the
corresponding bit will be set in the Interrupt Status Register 2 register. In Auto Fan Control mode, the
fan can run at high speeds (100% duty cycle), so care should be taken in software to ensure that the
limit is low enough not to cause sporadic alerts. Note that an interrupt status event will be generated
when the tachometer reading is greater than the minimum tachometer limit.
The fan tachometer will not cause a bit to be set in the interrupt status register if the current value in
the associated Current PWM Duty registers is 00h or if the PWM is disabled via the PWM
Configuration Register.
-127°c
127°c
-50°c
50°c
0°c
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Table
Tach1 Minimum MSB
Tach2 Minimum MSB
Tach3 Minimum MSB
Tach4 Minimum MSB
Tach1 Minimum LSB
Tach2 Minimum LSB
Tach3 Minimum LSB
Tach4 Minimum LSB
Register Name
7.6.
Table 7.6 Temperature Limits vs. Register Settings
Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features
DATASHEET
LIMIT (DEC)
(MSb)
Bit 7
15
15
15
15
7
7
7
7
-127
127
-50
50
0
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58
Bit 6
14
14
14
14
6
6
6
6
Bit 5
13
13
13
13
5
5
5
5
Bit 4
12
12
12
12
4
4
4
4
Bit 3
11
11
11
11
3
3
3
3
Bit 2
10
10
10
10
2
2
2
2
LIMIT (HEX)
CEh
Bit 1
7Fh
81h
00h
32h
1
9
1
9
1
9
1
9
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SMSC EMC6D102
(LSb)
Bit 0
0
8
0
8
0
8
0
8
Datasheet
Default
Value
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh