BOXDP965LTCK Intel, BOXDP965LTCK Datasheet - Page 43

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BOXDP965LTCK

Manufacturer Part Number
BOXDP965LTCK
Description
Manufacturer
Intel
Datasheet

Specifications of BOXDP965LTCK

Lead Free Status / Rohs Status
Compliant
2
What This Chapter Contains
2.1
2.1.1
2.1 Memory Map................................................................................... 43
2.2 DMA Channels................................................................................. 45
2.3 Fixed I/O Map ................................................................................. 46
2.4 PCI Configuration Space Map ............................................................ 47
2.5 Interrupts ...................................................................................... 48
2.6 PCI Interrupt Routing Map ................................................................ 49
2.7 Connectors and Headers................................................................... 50
2.8 Jumper Block .................................................................................. 60
2.9 Mechanical Considerations ................................................................ 61
2.10 Electrical Considerations ................................................................... 63
2.11 Thermal Considerations .................................................................... 65
2.12 Reliability ....................................................................................... 67
2.13 Environmental ................................................................................ 67
The board utilizes 8 GB of addressable system memory. Typically the address space
that is allocated for PCI Conventional bus add-in cards, PCI Express configuration
space, BIOS (SPI Flash), and chipset overhead resides above the top of DRAM (total
system memory). On a system that has 8 GB of system memory installed, it is not
possible to use all of the installed memory due to system address space being
allocated for other system critical functions. These functions include the following:
BIOS/ SPI Flash (8 Mbits)
Local APIC (19 MB)
Digital Media Interface (40 MB)
Front side bus interrupts (17 MB)
PCI Express configuration space (256 MB)
MCH base address registers, internal graphics ranges, PCI Express ports (up to
512 MB)
Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI
Express add-in cards
Technical Reference
Memory Map
Addressable Memory
43