TC59SM808BFTL-70 Toshiba, TC59SM808BFTL-70 Datasheet - Page 40

• Manufacturer Part Number: TC59SM808BFTL-70
• Manufacturer: Toshiba

Specifications of TC59SM808BFTL-70

• Lead Free Status / Rohs Status: Not Compliant

10. CLK suspension and Input/Output Mask
8. Refresh Operation
9. Power Down Mode
similar to the CAS -before- RAS refresh of conventional DRAMs and is performed by issuing the Auto Refresh
command while all banks are in the idle state. By repeating the Auto Refresh cycle, all banks refreshed
automatically. The Refresh operation must be performed 8192 times (rows) within 64 ms (Figure 11). The period
between the Auto Refresh command and the next command is specified by t
the idle state. The device is in Self Refresh mode for as long as CKE is held “low”. In Self Refresh mode, all
input/output buffers (except the CKE buffer) are disabled to lower power dissipation (Figure 12).
within 7.8 µs before entering and after exiting the Self Refresh mode.
7.8 µs or faster and the last distributed Auto Refresh command must be performed within 7.8 µs before entering
the Self Refresh mode. After exiting from the Self Refresh mode, the refresh operation must be performed
within 7.8 µs.
lower power dissipation in the idle state. Power Down mode is entered by asserting CKE “low” while the device
is not running a Burst cycle. Taking CKE “high” exit this mode. When CKE goes high, a No-operation command
must be input at next CLK rising edge of CLK (Figure 13) and CKE should be set high at least 1CLK + t
Power Down Mode Exit.
operation is frozen from the next cycle. A Read/Write operation is held intact until the CKE signal is taken
“high”.
and performing word mask in a Write cycle. When the DQM is asserted “high” at the positive edge of CLK, the
output data is disabled after two clock cycles in the case of a Read operation and the write data is masked at the
same clock cycle in the case of a Write operation. The timing relations between the CKE timing and DQM are
described in Figure 21 (a) and 21 (b).
Two types of Refresh operation can be performed on the device: Auto Refresh and Self Refresh. Auto Refresh is
Self Refresh mode is entered by issuing the Self Refresh command (CKE asserted “low”) while all banks are in
In the case of 8192 burst Auto Refresh commands, 8192 burst Auto Refresh commands must be performed
In the case of distributed Auto Refresh commands, distributed Auto Refresh commands must be issued every
When the device enters the Power Down mode, all input/output buffers (except CKE buffer) are disabled to
When the device is running a Burst cycle, the internal CLK is suspended by asserting CKE “low” the burst
The Output Disable/Write Mask signal (DQM) has two functions, controlling the output data in a Read cycle
TC59SM816/08/04BFT/BFTL-70,-75,-80
RC
.
2001-06-11 40/49
CKS
at