K4H281638B-TCB0000 Samsung Semiconductor, K4H281638B-TCB0000 Datasheet - Page 32

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K4H281638B-TCB0000

Manufacturer Part Number
K4H281638B-TCB0000
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of K4H281638B-TCB0000

Lead Free Status / Rohs Status
Supplier Unconfirmed
*1
128Mb DDR SDRAM
Burst length = 4
*2
READ+AP
Precharge
command
3.3.12 Write with Auto Precharge
command to the same bank should not be issued until the internal precharge is completed. The internal pre-
charge begins after keeping tWR(min).
Asserted
WRITE+
: AP = Auto Precharge
: DM : Refer to " 3.3.7 Write Interrupted by a Read & DM " in page 25.
WRITE
READ
If A10 is high when write command is issued , the write with auto-precharge function is performed. Any new
Active
AP
Command
< Burst Length=4 >
WRITE+
No AP
CK
CK
D Q S
D Q s
WRITE+
Illegal
Illegal
Illegal
Illegal
AP
3
BANK A
ACTIVE
*1
0
READ+NO
AP+DM
WRITE+
WRITE+
READ +
AP+DM
No AP
Illegal
Illegal
AP
4
NOP
Table 7. Operating description when new command asserted
1
*2
Figure 20. Write with auto precharge timing
Auto Precharge
WRITE A
READ+NO
For same Bank
READ +
AP+DM
AP+DM
Illegal
Illegal
Illegal
Illegal
while write with auto precharge is issued
2
5
Din 0
NOP
READ +
READ+
- 32 -
NO AP
Illegal
Illegal
Illegal
Illegal
3
AP
Din 1 Din 2
6
NOP
4
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
Din 3
7
NOP
5
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
8
t
WR
Internal precharge start
REV. 1.31 Nov. 3. 2001
NOP
Illegal
Illegal
Legal
Legal
Legal
Legal
6
3
NOP
* Bank can be reactivated at
Illegal
Illegal
Legal
Legal
Legal
Legal
completion of
For Different Bank
4
7
t
Illegal
Illegal
RP
Legal
Legal
Legal
Legal
NOP
t
5
RP
8
Legal
Legal
Legal
Legal
Legal
Legal
6
Legal
Legal
Legal
Legal
Legal
Legal
7

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