ADSP-BF527KBCZ-6C2 Analog Devices Inc, ADSP-BF527KBCZ-6C2 Datasheet - Page 29

• Manufacturer Part Number: ADSP-BF527KBCZ-6C2
• Description: IC DSP 16BIT 600MHZ 289CSPBGA
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF527KBCZ-6C2

• Package / Case: 289-CSPBGA
• Interface: DMA, Ethernet, I²C, PPI, SPI, SPORT, UART, USB
• Clock Rate: 600MHz
• Non-volatile Memory: ROM (32 kB)
• On-chip Ram: 132kB
• Voltage - I/o: 1.8V, 2.5V, 3.3V
• Voltage - Core: 1.10V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Svhc: No SVHC (18-Jun-2010)
• Cache On Chip L1/l2 Memory: 48KB
• Core Frequency Typ: 600MHz
• Dsp Type: Core
• External Supported Memory: SDRAM, SRAM, FLASH, ROM
• Interface Type: SPI, Parallel, 2 Wire
• Rohs Compliant: Yes
• Mmac: 1200
• No. Of Pins: 289
• Package: 289CSP-BGA
• Maximum Speed: 600 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BF527-MPSKIT - BOARD EVAL MEDIA PLAYER BF527ADZS-BF527-EZLITE - BOARD EVAL ADSP-BF527
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

System Clock Timing
Table 21. System Clock Timing
1
Parameter
t
t
t
t
t
t
AVDD, HPVDD, V
XTIY
MCLKDS
XTIH
XTIL
COP
COPDIV2
ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C
CODEC_CLKOUT/2
CODEC_MCLK/XTI
DDEXT
CODEC_CLKOUT
XTI/CODEC_MCLK system clock cycle time
XTI/CODEC_MCLK duty cycle
XTI/CODEC_MCLK system clock pulse width high
XTI/CODEC_MCLK system clock pulse width low
CODEC_CLKOUT propagation delay from XTI/CODEC_MCLK falling edge
CLKODIV2 propagation delay from XTI/CODEC_MCLK falling edge
= 3.3 V, AGND = 0 V, T
A
= +25°C, Slave Mode, f
t XTIH
Figure 22. System (CODEC_MCLK) Clock Timing
Rev. A | Page 29 of 36 | March 2010
t
XTIY
S
= 48 kHz, XTI/CODEC_MCLK = 256 × f
t
XTIL
t
COPDIV2
Test Conditions
S
unless otherwise stated.
t COP
1
Min
72
40:60
32
32
20
20
Max
60:40
Unit
ns
ns
ns
ns
ns