ADSP-BF527KBCZ-6C2 Analog Devices Inc, ADSP-BF527KBCZ-6C2 Datasheet - Page 9

• Manufacturer Part Number: ADSP-BF527KBCZ-6C2
• Description: IC DSP 16BIT 600MHZ 289CSPBGA
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF527KBCZ-6C2

• Package / Case: 289-CSPBGA
• Interface: DMA, Ethernet, I²C, PPI, SPI, SPORT, UART, USB
• Clock Rate: 600MHz
• Non-volatile Memory: ROM (32 kB)
• On-chip Ram: 132kB
• Voltage - I/o: 1.8V, 2.5V, 3.3V
• Voltage - Core: 1.10V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Svhc: No SVHC (18-Jun-2010)
• Cache On Chip L1/l2 Memory: 48KB
• Core Frequency Typ: 600MHz
• Dsp Type: Core
• External Supported Memory: SDRAM, SRAM, FLASH, ROM
• Interface Type: SPI, Parallel, 2 Wire
• Rohs Compliant: Yes
• Mmac: 1200
• No. Of Pins: 289
• Package: 289CSP-BGA
• Maximum Speed: 600 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BF527-MPSKIT - BOARD EVAL MEDIA PLAYER BF527ADZS-BF527-EZLITE - BOARD EVAL ADSP-BF527
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Normal Mode
In normal mode, the codec supports digital audio sampling
rates from 8 kHz to 96 kHz. Normal mode supports 256 × f
384 × f
programmer must set the appropriate sampling rate register in
Table 1. Sampling Rate Lookup Table, Normal Mode (USB Disabled)
1
CODEC_MCLK
(CLKDIV2 = 0)
12.288 MHz
11.2896 MHz
18.432 MHz
16.9344 MHz
CODEC_BCLK frequency is for master mode and slave right-justified mode only.
ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C
S
based clocks. To select the desired sampling rate, the
CODEC_MCLK
(CLKDIV2 = 1)
24.576 MHz
22.5792 MHz
36.864 MHz
33.8688 MHz
ADC Sampling Rate
(ADCLRC)
8 kHz (CODEC_MCLK/1536)
8 kHz (CODEC_MCLK/1536)
12 kHz (CODEC_MCLK/1024)
16 kHz (CODEC_MCLK/768)
24 kHz (CODEC_MCLK/512)
32 kHz (CODEC_MCLK/384)
48 kHz (CODEC_MCLK/256)
48 kHz (CODEC_MCLK/256)
96 kHz (CODEC_MCLK/128)
8.0182 kHz (CODEC_MCLK/1408) 8.0182 kHz (CODEC_MCLK/1408) 0
8.0182 kHz (CODEC_MCLK/1408) 44.1 kHz (CODEC_MCLK/256)
11.025 kHz (CODEC_MCLK/1024) 11.025 kHz (CODEC_MCLK/1024) 0
22.05 kHz (CODEC_MCLK/512)
44.1 kHz (CODEC_MCLK/256)
44.1 kHz (CODEC_MCLK/256)
88.2 kHz (CODEC_MCLK/128)
8 kHz (CODEC_MCLK/2304)
8 kHz (CODEC_MCLK/2304)
12 kHz (CODEC_MCLK/1536)
16 kHz (CODEC_MCLK/1152)
24 kHz (CODEC_MCLK/768)
32 kHz (CODEC_MCLK/576)
48 kHz (CODEC_MCLK/384)
48 kHz (CODEC_MCLK/384)
96 kHz (CODEC_MCLK/192)
8.0182 kHz (CODEC_MCLK/2112) 8.0182 kHz (CODEC_MCLK/2112) 0
8.0182 kHz (CODEC_MCLK/2112) 44.1 kHz (CODEC_MCLK/384)
11.025 kHz (CODEC_MCLK/1536) 11.025 kHz (CODEC_MCLK/1536) 0
22.05 kHz (CODEC_MCLK/768)
44.1 kHz (CODEC_MCLK/384)
44.1 kHz (CODEC_MCLK/384)
88.2 kHz (CODEC_MCLK/192)
Rev. A | Page 9 of 36 | March 2010
S
and
DAC Sampling Rate
(DACLRC)
8 kHz (CODEC_MCLK/1536)
48 kHz (CODEC_MCLK/256)
12 kHz (CODEC_MCLK/1024)
16 kHz (CODEC_MCLK/768)
24 kHz (CODEC_MCLK/512)
32 kHz (CODEC_MCLK/384)
8 kHz (CODEC_MCLK/1536)
48 kHz (CODEC_MCLK/256)
96 kHz (CODEC_MCLK/128)
22.05 kHz (CODEC_MCLK/512)
8.0182 kHz (CODEC_MCLK/1408) 0
44.1 kHz (CODEC_MCLK/256)
88.2 kHz (CODEC_MCLK/128)
8 kHz (CODEC_MCLK/2304)
48 kHz (CODEC_MCLK/384)
12 kHz (CODEC_MCLK/1536)
16 kHz (CODEC_MCLK/1152)
24 kHz (CODEC_MCLK/768)
32 kHz (CODEC_MCLK/576)
48 kHz (CODEC_MCLK/384)
8 kHz (CODEC_MCLK/2304)
96 kHz (CODEC_MCLK/192)
22.05 kHz (CODEC_MCLK/768)
8.0182 kHz (CODEC_MCLK/2112) 0
44.1 kHz (CODEC_MCLK/384)
88.2 kHz (CODEC_MCLK/192)
the SR control bits (Register R8, Bit D2 to Bit D5) and match
this selection to the core clock frequency that is pulsed on the
CODEC_MCLK pin. See
normal mode.
Table 1
USB SR [3:0] BOSR CODEC_BCLK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0011
0010
0100
0101
1110
0110
0001
0000
0111
1011
1010
1100
1101
1001
1000
1111
0011
0010
0100
0101
1110
0110
0000
0001
0111
1011
1010
1100
1101
1001
1000
1111
for sampling rates in
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(MS = 1)
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/2
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/4
CODEC_MCLK/2
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/3
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/6
CODEC_MCLK/3
1