EP1AGX90EF1152I6N Altera, EP1AGX90EF1152I6N Datasheet - Page 151

• Manufacturer Part Number: EP1AGX90EF1152I6N
• Description: IC ARRIA GX FPGA 90K 1152FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX90EF1152I6N

• Number Of Logic Elements/cells: 90220
• Number Of Labs/clbs: 4511
• Total Ram Bits: 4477824
• Number Of I /o: 538
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1152-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2387

Chapter 4: DC and Switching Characteristics
I/O Timing Model
Table 4–44. Output Timing Measurement Methodology for Output Pins
© December 2009 Altera Corporation
1.8-V differential HSTL Class II
LVDS
LVPECL
Notes to
(1) Input measurement point at internal node is 0.5 V
(2) Output measuring point for V
(3) Input stimulus edge rate is 0 to V
(4) Less than 50-mV ripple on V
(5) V
CCPD
Table
= 2.97 V, less than 50-mV ripple on V
I/O Standard
4–44:
Figure 4–8
enable timing.
Figure 4–8. Measurement Setup for t
Note to
(1) V
CCIO
CCINT
MEAS
Figure
and V
CC
is 1.12 V for this measurement.
at buffer output is 0.5 V
in 0.2 ns (internal signal) from the driver preceding the I/O buffer.
OE
Din
Din
OE
and
CCPD
4–8:
, V
CCIO
Figure 4–9
CCINT
R
and V
S
—
—
—
CCINT
(
= 1.15 V with less than 30-mV ripple.

)
CCPD
.
, V
CCIO
R
show the measurement setup for output disable and output
100
100
D
CCINT
—
.
(

)
Loading and Termination
= 1.15 V.
xz
t
100 Ω
t
100 Ω
XZ
XZ
R
, Driving High to Tristate
Dout
T
Dout
, Driving Low to Tristate
25
—
—
(Note 1)
(

)
Dout
Dout
Din
(Note
OE
OE
Din
1.660
2.325
3.135
V
(V)
CCIO
Enable
Enable
1), (2),
V
0.790
TT
Disable
Disable
—
—
(3)
(V)
½ V
½ V
t
CCINT
t
hz
CCINT
lz
Arria GX Device Handbook, Volume 1
C
L
(pF)
0
0
0
100 mv
100 mv
Measurement
V
“1”
GND
CCIO
“0”
V
MEAS
1.1625
1.5675
Point
0.83
(V)
4–29