EP1S80F1020C7 Altera, EP1S80F1020C7 Datasheet - Page 16

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EP1S80F1020C7

Manufacturer Part Number
EP1S80F1020C7
Description
IC STRATIX FPGA 80K LE 1020-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S80F1020C7

Number Of Logic Elements/cells
79040
Number Of Labs/clbs
7904
Total Ram Bits
7427520
Number Of I /o
773
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1440
EP1S80F1020C7

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Functional Description
Figure 2–1. Stratix Block Diagram
2–2
Stratix Device Handbook, Volume 1
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IOEs
M512 RAM Blocks for
Dual-Port Memory, Shift
Registers, & FIFO Buffers
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dedicated clocks, these registers provide exceptional performance and
interface support with external memory devices such as DDR SDRAM,
FCRAM, ZBT, and QDR SRAM devices.
High-speed serial interface channels support transfers at up to 840 Mbps
using LVDS, LVPECL, 3.3-V PCML, or HyperTransport technology I/O
standards.
Figure 2–1
DSP
Block
DSP Blocks for
Multiplication and Full
Implementation of FIR Filters
shows an overview of the Stratix device.
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M4K RAM Blocks
for True Dual-Port
Memory & Other Embedded
Memory Functions
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IOEs Support DDR, PCI, GTL+, SSTL-3,
SSTL-2, HSTL, LVDS, LVPECL, PCML,
HyperTransport & other I/O Standards
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M-RAM Block
Altera Corporation
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July 2005

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