EP1S80F1020C7 Altera, EP1S80F1020C7 Datasheet - Page 40

• Manufacturer Part Number: EP1S80F1020C7
• Description: IC STRATIX FPGA 80K LE 1020-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S80F1020C7

• Number Of Logic Elements/cells: 79040
• Number Of Labs/clbs: 7904
• Total Ram Bits: 7427520
• Number Of I /o: 773
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Other names: 544-1440; EP1S80F1020C7

TriMatrix Memory
Figure 2–14. Shift Register Memory Configuration
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Stratix Device Handbook, Volume 1
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m-Bit Shift Register
m-Bit Shift Register
m-Bit Shift Register
m-Bit Shift Register
Memory Block Size
TriMatrix memory provides three different memory sizes for efficient
application support. The large number of M512 blocks are ideal for
designs with many shallow first-in first-out (FIFO) buffers. M4K blocks
provide additional resources for channelized functions that do not
require large amounts of storage. The M-RAM blocks provide a large
single block of RAM ideal for data packet storage. The different-sized
blocks allow Stratix devices to efficiently support variable-sized memory
in designs.
The Quartus II software automatically partitions the user-defined
memory into the embedded memory blocks using the most efficient size
combinations. You can also manually assign the memory to a specific
block size or a mixture of block sizes.
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Altera Corporation
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of Taps
July 2005