EP1S80F1020C7 Altera, EP1S80F1020C7 Datasheet - Page 64

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EP1S80F1020C7

Manufacturer Part Number
EP1S80F1020C7
Description
IC STRATIX FPGA 80K LE 1020-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S80F1020C7

Number Of Logic Elements/cells
79040
Number Of Labs/clbs
7904
Total Ram Bits
7427520
Number Of I /o
773
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1440
EP1S80F1020C7

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TriMatrix Memory
Figure 2–27. Read/Write Clock Mode in Simple Dual-Port Mode
Notes to
(1)
(2)
2–50
Stratix Device Handbook, Volume 1
wraddress[ ]
address[ ]
byteena[ ]
outclken
wrclock
rdclock
inclken
All registers shown except the rden register have asynchronous clear ports.
Violating the setup or hold time on the address registers could corrupt the memory contents. This applies to both
read and write operations.
data[ ]
wren
rden
Figure
8 LAB Row
Clocks
8
2–27:
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
Q
Q
Q
Q
Q
Q
Generator
Pulse
Write
Data In
Read Address
Write Address
Byte Enable
Read Enable
Write Enable
Notes
Memory Block
(1),
1,024 × 4
2,048 × 2
4,096 × 1
Data Out
256 × 16
512 × 8
(2)
D
ENA
Q
Altera Corporation
To MultiTrack
Interconnect
July 2005

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