EP1SGX40GF1020I6 Altera, EP1SGX40GF1020I6 Datasheet - Page 199

no-image

EP1SGX40GF1020I6

Manufacturer Part Number
EP1SGX40GF1020I6
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet

Specifications of EP1SGX40GF1020I6

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1020-FBGA
Family Name
Stratix GX
Number Of Logic Blocks/elements
41250
# I/os (max)
624
Frequency (max)
5GHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.5V
Logic Cells
41250
Ram Bits
3423744
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1SGX40GF1020I6
Manufacturer:
ALTERA
Quantity:
1 238
Part Number:
EP1SGX40GF1020I6
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1SGX40GF1020I6
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1SGX40GF1020I6
Manufacturer:
ALTERA
0
Part Number:
EP1SGX40GF1020I6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1SGX40GF1020I6N
Manufacturer:
XILINX
0
Part Number:
EP1SGX40GF1020I6N
Manufacturer:
ALTERA
0
Stratix GX
Automated
Single Event
Upset (SEU)
Detection
Altera Corporation
February 2005
Local Update Mode
Local update mode is a simplified version of the remote update. This
feature is intended for simple systems that need to load a single
application configuration immediately upon power-up without loading
the factory configuration first. Local update designs have only one
application configuration to load, so it does not require a factory
configuration to determine which application configuration to use.
Figure 5–3
Figure 5–3. Local Update Transition Diagram
Stratix GX devices offer on-chip circuitry for automated checking of
single event upset (SEU) detection. Some applications that require the
device to operate error free at high elevations or in close proximity to
earth’s North or South Pole require periodic checks to ensure continued
data integrity. The error detection cyclic redundancy code (CRC) feature
controlled by the Device & Pin Options dialog box in the Quartus II
software uses a 32-bit CRC circuit to ensure data reliability and is one of
the best options for mitigating SEU.
nCONFIG
shows the transition diagram for local update mode.
Configuration
Error
Configuration
Configuration
or nCONFIG
Application
Power-Up
Factory
Stratix GX Device Handbook, Volume 1
Configuration
Error
Configuration & Testing
nCONFIG
5–7

Related parts for EP1SGX40GF1020I6