EP1SGX40GF1020I6 Altera, EP1SGX40GF1020I6 Datasheet - Page 214

• Manufacturer Part Number: EP1SGX40GF1020I6
• Description: IC STRATIX GX FPGA 40K 1020-FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX40GF1020I6

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 624
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1020-FBGA
• Family Name: Stratix GX
• Number Of Logic Blocks/elements: 41250
• # I/os (max): 624
• Frequency (max): 5GHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 41250
• Ram Bits: 3423744
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 1020
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Operating Conditions
Figure 6–1. Receiver Input Waveforms for Differential I/O Standards
6–12
Stratix GX Device Handbook, Volume 1
Note to
(1)
V
Table 6–12. 1.5-V I/O Specifications (Part 2 of 2)
OL
Symbol
Drive strength is programmable according to values in found in the Stratix GX Architecture chapter of the
Stratix GX Device Handbook, Volume 1.
Tables 6–8
Single-Ended Waveform
Differential Waveform
Low-level output voltage
through 6–12:
Parameter
V
CM
Figures 6–1
waveforms, respectively, for all differential I/O standards (LVDS, 3.3-V
PCML, LVPECL, and HyperTransport technology).
V
ID
through
V
ID
I
OL
(V ID (Differential) = 2 x V ID (single-ended))
= 2 mA
6–3
Conditions
show receiver input and transmitter output
(1)
V
ID
Minimum
p − n = 0 V
Positive Channel (p) = V
Negative Channel (n) = V
Ground
0.25
Maximum
Altera Corporation
×
V
CCIO
OH
OL
June 2006
Units
V