EP2S130F1508C4N Altera, EP2S130F1508C4N Datasheet - Page 162

IC STRATIX II FPGA 130K 1508FBGA

EP2S130F1508C4N

Manufacturer Part Number
EP2S130F1508C4N
Description
IC STRATIX II FPGA 130K 1508FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S130F1508C4N

Number Of Logic Elements/cells
132540
Number Of Labs/clbs
6627
Total Ram Bits
6747840
Number Of I /o
1126
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1508-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1870
EP2S130F1508C4N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2S130F1508C4N
Manufacturer:
ALTERA
Quantity:
490
Part Number:
EP2S130F1508C4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2S130F1508C4N
Manufacturer:
XILINX
0
Part Number:
EP2S130F1508C4N
Manufacturer:
ALTERA
0
Part Number:
EP2S130F1508C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
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Timing Model
5–26
Stratix II Device Handbook, Volume 1
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
PCI
PCI-X
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL Class I
Table 5–35. Timing Measurement Methodology for Input Pins (Part 1 of 2)
(6)
(5)
(5)
(5)
(6)
(5)
(5)
I/O Standard
Figure 5–6. Measurement Setup for t
Table 5–35
Din
Din
OE
OE
specifies the input timing measurement setup.
V
CCIO
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
(V)
Measurement Conditions
t
t
1 MΩ
1 MΩ
ZX
ZX
V
, Tristate to Driving High
Dout
, Tristate to Driving Low
Dout
1.163
1.163
0.830
0.830
0.830
REF
(V)
zx
Dout
Dout
Din
Din
OE
OE
Edge Rate (ns)
Disable
Disable
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
Notes (1)–(4)
Enable
Enable
½ V
½ V
CCINT
CCINT
Measurement Point
t
t
zh
zl
Altera Corporation
V
M E A S
1.5675
1.5675
1.1875
0.7125
1.1625
1.1625
0.855
1.485
1.485
0.83
0.83
0.83
April 2011
(V)
½ V
½ V
“1”
“0”
CCIO
CCIO

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