EP2S130F1508C4N Altera, EP2S130F1508C4N Datasheet - Page 80

• Manufacturer Part Number: EP2S130F1508C4N
• Description: IC STRATIX II FPGA 130K 1508FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S130F1508C4N

• Number Of Logic Elements/cells: 132540
• Number Of Labs/clbs: 6627
• Total Ram Bits: 6747840
• Number Of I /o: 1126
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1508-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1870; EP2S130F1508C4N

I/O Structure
Figure 2–47. Row I/O Block Connection to the Interconnect
Note to
(1)
2–72
Stratix II Device Handbook, Volume 1
Interconnect
The 32 data and control signals consist of eight data out lines: four lines each for DDR applications
io_dataouta[3..0] and io_dataoutb[3..0], four output enables io_oe[3..0], four input clock enables
io_ce_in[3..0], four output clock enables io_ce_out[3..0], four clocks io_clk[3..0], four asynchronous
clear and preset signals io_aclr/apreset[3..0], and four synchronous clear and preset signals
io_sclr/spreset[3..0].
LAB Local
Figure
Interconnects
to Adjacent LAB
R4 & R24
Interconnect
2–47:
Direct Link
LAB
io_dataina[3..0]
io_datainb[3..0]
C4 Interconnect
to Adjacent LAB
Interconnect
Direct Link
I/O Block Local
Note (1)
Interconnect
io_clk[7:0]
32
Horizontal
I/O Block
up to Four IOEs
Block Contains
Horizontal I/O
Altera Corporation
32 Data & Control
Signals from
Logic Array (1)
May 2007