Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 27

• Manufacturer Part Number: Z9025106PSG
• Description: IC 32K 8BIT DTC OTP 42-DIP
• Manufacturer: Zilog

Specifications of Z9025106PSG

• Applications: TV Controller
• Core Processor: Z8
• Program Memory Type: OTP (32 kB)
• Controller Series: Digital Television Controller (DTC)
• Ram Size: 300 x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 27
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 42-DIP (0.600", 15.24mm)
• Processor Series: Z902x
• Core: Z8
• Data Bus Width: 8 bit
• Program Memory Size: 32 KB
• Data Ram Size: 300 B
• Interface Type: I2C
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 27
• Mounting Style: Through Hole
• On-chip Adc: 4 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 6
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/
Field
Stop flag
Stop Recovery level
Stop Delay
Stop Mode Recover
Source
External Clock Divide by 2
SCLK/TCLK Divide by 16
SCLK/TCLK Divide-by-16
Select (bit O)
Stop Mode Recovery (SMR) Register 0Bh: Bank F (SMR)
R
7
0
W
6
0
Bit
Position
4-2
7
6
5
1
0
W
5
1
This bit controls a divide-by-16 prescaler of
SCLK/TCLK. The purpose of this control is to
reduce device power consumption selectively
during normal processor execution (SCLK
control) and/or Halt Mode (where TCLK
sources counter/timers and interrupt logic).
R/W
W
W
W
W
W
R
32 KB Television Controller with OSD
W
4
0
Value Description
000
001
010
011
100
101
110
111
0
1
0
1
0
1
0
1
0
1
W
3
0
POR
Stop Recovery
Low POR
High
Off
On POR
POR and /or External Reset
P63
P62
Must NOT be used
Must NOT be used
P27
P2 NOR 0-3
P2 NOR 0-7
SCLK/TCLK = XTAL/2 POR
SCLK/TCLK = XTAL
Off POR
On
W
2
0
W
1
0
PS001301-0800
W
0
0
19