Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 46

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The Hex Add column is a hexadecimal number that serves as an address for the
group of pixels from the starting point of the scan line. Addressing begins at
0000h and ends at 0023h for the first character. There is an address gap
between characters. The starting address for the second character is 0040h.
Each bit in the map sets the foreground/background designation of the
corresponding pixel:
The patterns formed by the bits comprise the characters that are displayed when
the scan line is output to the screen.
Each of these character pixel maps is one character; 512 characters can be
mapped.
Several characters can be combined to form a large icon. Figures 13 is an
example of a large icon. Each block marked by the darker grid lines is 14 x 18
pixels, one character.
Figure 13 Example of a Multiple Character Icon
0 background pixel
1 foreground pixel
No spacing
No Spacing
Fringing Effect
6HL
Spacing
Row 4
Row 5
Row 6
Row 7
32 KB Television Controller with OSD
PS001301-0800
38

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