Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 39

• Manufacturer Part Number: Z9025106PSG
• Description: IC 32K 8BIT DTC OTP 42-DIP
• Manufacturer: Zilog

Specifications of Z9025106PSG

• Applications: TV Controller
• Core Processor: Z8
• Program Memory Type: OTP (32 kB)
• Controller Series: Digital Television Controller (DTC)
• Ram Size: 300 x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 27
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 42-DIP (0.600", 15.24mm)
• Processor Series: Z902x
• Core: Z8
• Data Bus Width: 8 bit
• Program Memory Size: 32 KB
• Data Ram Size: 300 B
• Interface Type: I2C
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 27
• Mounting Style: Through Hole
• On-chip Adc: 4 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bits 7, 6, 5, and 4, VBLANK Delay, set the amount of time that the VBLANK signal
is properly aligned with the OSD RGB output with delay from external circuitries.
Bit 3, Character Foreground for Halftone Effect, defines whether displaying a
foreground color for character display is included. If bit 3 is set to 0, halftone is
disabled for pixels with foreground color. If bit 3 is set to 1, halftone is active for
pixels with both foreground and background colors.
Bit 0, Mesh Window Row, sets the mesh effect to On or Off for the next row of the
OSD.
Table 16 Mesh Control Register 07h: Bank F (MC_Reg)
Bit/
Field
V
Foreground Character for
Halftone Effect
Reserved
Mesh Window Row
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
BLANK
Delay
7
R/W
0
6
R/W
0
Bit
Position R/W Value
7, 6, 5, 4 R/W
3
2, 1
0
5
R/W
0
R/W
R/W
R/W
4
32 KB Television Controller with OSD
R/W
0
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
1110
1111
0
1
0
1
3
R/W
0
Description
No Delay
Delay by 0.5 Dot-Clock Period
Delay by 1.0 Dot-Clock Period
Delay by 1.5 Dot-Clock Period
Delay by 2.0 Dot-Clock Period
Delay by 2.5 Dot-Clock Period
Delay by 3.0 Dot-Clock Period
Delay by 3.5 Dot-Clock Period
Delay by 4.0 Dot-Clock Period
Delay by 4.5 Dot-Clock Period
Delay by 5.0 Dot-Clock Period
Delay by 5.5 Dot-Clock Period
Delay by 6.0 Dot-Clock Period
Delay by 6.5 Dot-Clock Period
Delay by 7.0 Dot-Clock Period
Delay by 7.5 Dot-Clock Period
Not included
Included
Must be 0
No mesh OSD for Next Row
Mesh OSD for Next Row
2
R/W
0
1
R/W
PS001301-0800
0
0
R/W
0
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