Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 29

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SMR D4 D3 D2
Stop-Mode Recovery Edge
Select (SMR)
VDD
0
P63
P62
0
SMR D4 D3 D2
0
Note:
Figure 7
Stop Mode Recovery Level
Select (bit 6)
Cold or Warm Start (bit 7)
0
0
If P62 is used as an SMR source, the digital mode of operation
must be selected before entering Stop Mode.
0
1
0
Stop Mode Recovery Source/Level Select
1
P27
SMR D4 D3 D2
1
0
1
P20
P23
A 1 in this bit position indicates that a High level
on any one of the recovery sources wakes the
microcontroller from Stop Mode. A 0 indicates
Low-level recovery. The default is 0 on POR.
This bit is set by the device when Stop Mode is
entered. A 0 in this bit (cold) indicates that the
device reset by POR/WDT Reset. A 1 in this bit
(warm) indicates that the device awakens by a
SMR source.
32 KB Television Controller with OSD
SMR D4 D3 D2
1
1
P20
P27
0
To IRQ1
SMR D4 D3 D2
PS001301-0800
1
1
To POR
1
Reset
21

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