AT43USB325E-AU Atmel, AT43USB325E-AU Datasheet - Page 24

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AT43USB325E-AU

Manufacturer Part Number
AT43USB325E-AU
Description
IC USB KEYBOARD CTRLR 64LQFP
Manufacturer
Atmel
Series
AVR®r
Datasheet

Specifications of AT43USB325E-AU

Applications
Keyboard Controller
Core Processor
AVR
Program Memory Type
SRAM (16 kB)
Controller Series
AT43USB
Ram Size
512 x 8
Interface
SPI, 3-Wire Serial
Number Of I /o
42
Voltage - Supply
4.4 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT43USB325E-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT43USB325E-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Figure 4-3.
4.6
24
Power-on Reset
AT43USB325
1-MHz Clock
RSTN
VCC
Reset Logic
When the USB hardware is reset, the compound device is de-configured and has to be re-enu-
merated by the host. When the microcontroller is reset, all I/O registers are then set to their initial
values, and the program starts execution from address $000. The instruction placed in address
$000 must be a JMP instruction to the reset handling routine. If the program never enables an
interrupt source, the interrupt vectors are not used, and regular program code can be placed at
these locations. The circuit diagram in
A Power-on Reset (POR) circuit ensures that the device is reset from power-on. An internal
timer clocked from the Watchdog timer oscillator prevents the MCU from starting until after a cer-
tain period after V
time.
If the build-in start-up delay is sufficient, RESET can be connected to V
external pull-up resistor. By holding the pin low for a period after V
Power-on Reset period can be extended.
Watchdog Timer
– Separated reset: A USB bus reset will only reset the USB hardware, while an
Reset Ckt
POR Ckt
Divider
interrupt to the microcontroller will be generated if the BUS INT MSK bit, bit 3 of
SPRSMSK register, is also set.
CC
has reached the power-on threshold voltage, regardless of the V
USB Reset
14-bit Cntr
Figure 4-3
OR
shows the reset logic.
Cntr Reset
FSTRT
R
S
CC
has been applied, the
ON
CC
directly or via an
3355C–USB–4/05
CC
rise

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