AT43USB325E-AU Atmel, AT43USB325E-AU Datasheet - Page 41

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AT43USB325E-AU

Manufacturer Part Number
AT43USB325E-AU
Description
IC USB KEYBOARD CTRLR 64LQFP
Manufacturer
Atmel
Series
AVR®r
Datasheet

Specifications of AT43USB325E-AU

Applications
Keyboard Controller
Core Processor
AVR
Program Memory Type
SRAM (16 kB)
Controller Series
AT43USB
Ram Size
512 x 8
Interface
SPI, 3-Wire Serial
Number Of I /o
42
Voltage - Supply
4.4 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Atmel
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5.1.2
5.2
5.2.1
3355C–USB–4/05
Sleep Modes
Stack Pointer Register – SP
Power Down Mode
The Stack Pointer points to the data SRAM stack area where the Subroutine and Interrupt
Stacks are located. This Stack space in the data SRAM must be defined by the program before
any subroutine calls are executed or interrupts are enabled. The stack pointer must be set to
point above $60. The Stack Pointer is decremented by one when data is pushed onto the Stack
with the PUSH instruction, and it is decremented by two when an address is pushed onto the
Stack with subroutine calls and interrupts. The Stack Pointer is incremented by one when data is
popped from the Stack with the POP instruction and it is incremented by two when an address is
popped from the Stack with return from subroutine RET or return from interrupt RETI.
To enter the sleep modes, the SE bit in MCUCR must be set (one) and a SLEEP instruction
must be executed. If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU
awakes, executes the interrupt routine, and resumes execution from the instruction following
SLEEP. The contents of the register file, SRAM and I/O memory are unaltered. If a reset occurs
during sleep mode, the MCU wakes up and executes from the Reset vector.
When the SM bit is set (one), the SLEEP instruction forces the MCU into the Power Down Mode.
In this mode, the external oscillator is stopped, while the external interrupts continue operating.
Only an external reset, an external level interrupt on INT0 or INT1, can wake up the MCU.
Note that when a level triggered interrupt is used for wake-up from power down, the low level
must be held for a time longer than the reset delay time-out period t
will fail to wake up.
Initial Value
Read/Write
$3D ($5D)
$3E ($5E)
Bit
SP7
R/W
R/W
15
7
0
0
I
SP6
R/W
R/W
14
T
6
0
0
R/W
R/W
SP5
13
H
5
0
0
R/W
R/W
SP4
12
S
4
0
0
R/W
R/W
SP3
11
V
3
0
0
R/W
R/W
SP2
10
N
2
0
0
TOUT
AT43USB325
R/W
R/W
SP1
Z
9
1
0
0
. Otherwise, the MCU
SP0
R/W
R/W
C
8
0
0
0
SPH
SPL
41

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