AT43USB325E-AU Atmel, AT43USB325E-AU Datasheet - Page 61

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AT43USB325E-AU

Manufacturer Part Number
AT43USB325E-AU
Description
IC USB KEYBOARD CTRLR 64LQFP
Manufacturer
Atmel
Series
AVR®r
Datasheet

Specifications of AT43USB325E-AU

Applications
Keyboard Controller
Core Processor
AVR
Program Memory Type
SRAM (16 kB)
Controller Series
AT43USB
Ram Size
512 x 8
Interface
SPI, 3-Wire Serial
Number Of I /o
42
Voltage - Supply
4.4 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT43USB325E-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT43USB325E-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
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7.5.3
7.5.4
7.6
3355C–USB–4/05
Port F
Port E Input Pins Address – PINE
Port E as General Digital I/O
The Port E Input Pins address, PINE, is not a register, and this address enables access to the
physical value on each Port E pin. When reading PORTE the Port E Data Latch is read, and
when reading PINE, the logical values present on the pins are read.
PEn, General I/O Pin: The DDEn bit in the DDRE register selects the direction of this pin. If
DDEn is set (one), PEn is con-figured as an output pin. If DDEn is cleared (zero), PEn is config-
ured as an input pin. The value of PORTEn has no meaning in this mode. The Port E pins are tri-
stated when a reset condition becomes active.
Table 7-4.
Note:
Port F[1:3] is a 3-bit bi-directional I/O that becomes available after the program memory is writ-
ten at the end of POR. Three I/O memory address locations are allocated for the Port F, one
each for the Data Register - PORTF, $06($26), Data Direction Register - DDRF, $05($25) and
the Port F Input Pins - PIND, $04($24). The Port F Input Pins address is read only, while the
Data Register and the Data Direction Register are read/write. Some Port F pins have alternate
functions as shown in the following table:
Table 7-5.
After power up, PF[1:3] are used to load the program memory. This process is automatic. After
completion of program memory downloading, the SSN pin is de-asserted (=logic 1) and the pins
functions as GPIOs. When the pins are used for the alternate function, after downloading is
completed, the DDRF and PORTF register has to be set according to the alternate function
description.
Port Pin
Read/Write
Initial Value
$01 ($21)
PF1
PF2
PF3
Bit
DDEn
n: 7,6…0, pin number
0
0
1
1
Alternate Function 1
SCK (SPI Bus Serial Clock)
MOSI (SPI Bus Master Output/Slave Input)
MISO (SPI Bus Master Input/Slave Output)
PINE7
R/W
N/A
DDEn Bits on Port E Pins
Port F Pins Alternate Functions
7
PORTEn
PINE6
R/W
N/A
6
0
1
0
1
PINE5
R/W
N/A
5
Output
Output
Input
Input
PINE4
I/O
R/W
N/A
4
PINE3
R/W
N/A
3
Push-pull Zero Output
Push-pull One Output
Comment
Tri-state (Hi-Z)
Tri-state (Hi-Z)
Alternate Function 2
OC1A (Timer/Counter1 Output CompareA
Match Output)
OC1B (Timer/Counter1 Output CompareB
Match Output)
ICP (Timer/Counter1 Input Capture)
PINE2
R/W
N/A
2
AT43USB325
PINE1
N/A
R
1
PINE0
N/A
R
0
PINE
61

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