CY7C68013-56PVXC Cypress Semiconductor Corp, CY7C68013-56PVXC Datasheet - Page 43

• Manufacturer Part Number: CY7C68013-56PVXC
• Description: IC MCU USB PERIPH HI SPD 56SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68013-56PVXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-1623

9.7
Table 9-8. Slave FIFO Asynchronous Read Parameters
9.8
Table 9-9. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK
Document #: 38-08012 Rev. *C
t
t
t
t
t
t
t
t
t
t
t
t
Note:
16. Slave FIFO asynchronous parameter values use internal IFCLK setting at 48 MHz.
RDpwl
RDpwh
XFLG
XFD
OEon
OEoff
IFCLK
SWR
WRH
SFD
FDH
XFLG
Parameter
Parameter
Slave FIFO Asynchronous Read
Slave FIFO Synchronous Write
SLRD Pulse Width LOW
SLRD Pulse Width HIGH
SLRD to FLAGS Output Propagation Delay
SLRD to FIFO Data Output Propagation Delay
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
IFCLK Period
SLWR to Clock Set-up Time
Clock to SLWR Hold Time
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
FLAGS
FLAGS
DATA
Figure 9-6. Slave FIFO Asynchronous Read Timing Diagram
SLOE
IFCLK
SLWR
SLRD
DATA
Figure 9-7. Slave FIFO Synchronous Write Timing Diagram
Z
Description
Description
t
OEon
N
t
[16]
RDpwl
t
XFD
t
SWR
t
SFD
N+1
t
IFCLK
t
WRH
t
N
t
XFLG
FDH
t
XFLG
t
t
RDpwh
OEoff
20.83
Min.
Min.
18.1
9.2
50
50
0
0
Z
[15]
[13]
[13]
Max.
Max.
10.5
10.5
9.5
70
15
CY7C68013
Page 43 of 52
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns