MPC8313CVRADDB Freescale Semiconductor, MPC8313CVRADDB Datasheet - Page 90

• Manufacturer Part Number: MPC8313CVRADDB
• Description: MPU POWERQUICC II PRO 516-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CVRADDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 267MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8313E-RDB
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: - 0.3 V to + 1.26 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 16 KB
• I/o Voltage: 2.5 V
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• Program Memory Type: EEPROM/Flash
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

System Design Information
22.4
The SerDes block requires a clean, tightly regulated source of power (XCOREV
ensure low jitter on transmit and reliable recovery of data in the receiver. An appropriate decoupling
scheme is outlined below.
Only SMT capacitors should be used to minimize inductance. Connections from all capacitors to power
and ground should be done with multiple vias to further reduce inductance.
22.5
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level. Unused active low inputs should be tied to NV
Unused active high inputs should be connected to V
unconnected.
Power and ground connections must be made to all external V
and V
22.6
The MPC8313E drivers are characterized over process, voltage, and temperature. For all buses, the driver
is a push-pull single-ended driver type (open drain for I
To measure Z
or V
output impedance is the average of two components, the resistances of the pull-up and pull-down devices.
When data is held high, SW1 is closed (SW2 is open), and R
NV
other in value. Then, Z
90
DD
•
•
•
SS
SS
/2. R
. Then, the value of each resistor is varied until the pad voltage is NV
First, the board should have at least 10 × 10-nF SMT ceramic chip capacitors as close as possible
to the supply balls of the device. Where the board has blind vias, these capacitors should be placed
directly below the chip supply and ground connections. Where the board does not have blind vias,
these capacitors should be placed in a ring around the device as close to the supply and ground
connections as possible.
Second, there should be a 1-µF ceramic chip capacitor from each SerDes supply (XCOREV
XPADV
SerDes supplies.
Third, between the device and any SerDes voltage regulator there should be a 10-µF, low
equivalent series resistance (ESR) SMT tantalum chip capacitor and a 100-µF, low ESR SMT
tantalum chip capacitor. This should be done for all SerDes supplies.
pins of the device.
Connection Recommendations
SerDes Block Power Supply Decoupling Recommendations
Output Buffer DC Impedance
P
then becomes the resistance of the pull-up devices. R
0
for the single-ended drivers, an external resistor is connected from the chip pad to NV
DD
) to the board ground plane on each side of the device. This should be done for all
MPC8313E PowerQUICC
0
= (R
P
+ R
N
)/2.
™
II Pro Processor Hardware Specifications, Rev. 3
SS
DD
. All NC (no-connect) signals must remain
2
, GV
C).
P
DD
is trimmed until the voltage at the pad equals
DD
, LV
, NV
P
and R
DD
DD
, LV
, GV
N
are designed to be close to each
DDA
DD
DD
/2 (see
, or LV
, LV
DD
and XPADV
DD
Freescale Semiconductor
Figure
DDB
, LV
DDA
as required.
60). The
, LV
DD
DD
) to
DDB
and
DD
,