MC68340AG16VE Freescale Semiconductor, MC68340AG16VE Datasheet - Page 36

• Manufacturer Part Number: MC68340AG16VE
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16VE

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

2.1 SIGNAL INDEX
The input and output signals for the MC68340 are listed in Table 2-1. The name,
mnemonic, and brief functional description are presented. For more detail on each signal,
refer to the signal paragraph. Guaranteed timing specifications for the signals listed in
Table 2-1 can be found in Section 11 Electrical Characteristics.
2-2
Address Bus
Address Bus/Port A7–A0/
Interrupt Acknowledge
Data Bus
Function Codes
Chip Select 3–1/
Interrupt Request Level/
Port B4, B2, B1
Chip Select 0/Autovector
Bus Request
Bus Grant
Bus Grant Acknowledge
Data and Size
Acknowledge
Read-Modify-Write Cycle
Address Strobe
Data Strobe
Size
Read/Write
Interrupt Request Level/
Port B7, B6, B5, B3
Reset
Halt
Bus Error
System Clock
Crystal Oscillator
External Filter Capacitor
Signal Name
EXTAL, XTAL
IRQ7, IRQ6,
IRQ5, IRQ3
Mnemonic
SIZ1, SIZ0
CS3–CS1
FC3–FC0
DSACK1,
A31–A24
DSACK0
CLKOUT
D15–D0
A23–A0
BGACK
Freescale Semiconductor, Inc.
RESET
HALT
BERR
RMC
CS0
R/ W
XFC
BR
BG
AS
DS
For More Information On This Product,
Table 2-1. Signal Index
MC68340 USER’S MANUAL
Go to: www.freescale.com
The 16-bit data bus used to transfer byte or word data
Lower 24 bits of the address bus
Upper eight bits of the address bus, parallel I/O port, or
interrupt acknowledge lines
Identify the processor state and the address space of the
current bus cycle
Enables peripherals at programmed addresses, interrupt
priority level to the CPU32, or parallel I/O port
Enables peripherals at programmed addresses or
requests an automatic vector
Indicates that an external device requires bus mastership
Indicates that current bus cycle is complete and the
MC68340 has relinquished the bus
Indicates that an external device has assumed bus
mastership
Provides asynchronous data transfers and dynamic bus
sizing
Identifies the bus cycle as part of an indivisible read -
modify-write operation
Indicates that a valid address is on the address bus
During a read cycle, DS indicates that an external device
should place valid data on the data bus. During a write
cycle, DS indicates that valid data is on the data bus.
Indicates the number of bytes remaining to be transferred
for this cycle
Indicates the direction of data transfer on the bus
Provides an interrupt priority level to the CPU32 or
becomes a parallel I/O port
System reset
Suspends external bus activity
Indicates an invalid bus operation is being attempted
System clock out
Connections for an external crystal or oscillator to the
internal oscillator circuit
Connection pin for an external capacitor to filter the circuit
of the phase-locked loop
Function
MOTOROLA
Out/I/O/Out
Output
Out/In/
In, Out
Out/In
Input/
In/I/O
Out
Out
Out
Out
Out
Out
Out
Out
Out
I/O
I/O
I/O
I/O
In
In
In
In
In