MPC8358EZQAGDGA Freescale Semiconductor, MPC8358EZQAGDGA Datasheet - Page 38

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MPC8358EZQAGDGA

Manufacturer Part Number
MPC8358EZQAGDGA
Description
MPU POWERQUICC II PRO 668-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8358EZQAGDGA

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
668-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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UCC Ethernet Controller: Three-Speed Ethernet, MII Management
Figure 20
8.3.3
Table 37
38
At recommended operating conditions with LV
MDC fall time
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. This parameter is dependent on the csb_clk speed (that is, for a csb_clk of 267 MHz, the maximum frequency is 8.3 MHz
3. This parameter is dependent on the ce_clk speed (that is, for a ce_clk of 200 MHz, the delay is 90 ns and for a ce_clk of
Timer clock frequency
Input setup to timer clock
Input hold from timer clock
Output clock to output valid
inputs and t
data timing (MD) for the time t
Also, t
(V) relative to the t
convention is used with the appropriate letter: R (rise) or F (fall).
and the minimum frequency is 1.2 MHz; for a csb_clk of 375 MHz, the maximum frequency is 11.7 MHz and the minimum
frequency is 1.7 MHz).
300 MHz, the delay is 63 ns).
MDRDVKH
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
Parameter/Condition
provides the IEEE 1588 timer AC specifications.
shows the MII management AC timing diagram.
IEEE 1588 Timer AC Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
symbolizes management data timing (MD) with respect to the time data input signals (D) reach the valid state
(Output)
MDC
(Input)
MDIO
MDIO
MDC
Parameter
Table 36. MII Management AC Timing Specifications (continued)
clock reference (K) going to the high (H) state or setup time. For rise and fall times, the latter
Figure 20. MII Management Interface Timing Diagram
MDC
Table 37. IEEE 1588 Timer AC Specifications
from clock reference (K) high (H) until data outputs (D) are invalid (X) or data hold time.
t
MDCH
DD
t
MDRDVKH
is 3.3 V ± 10%.
t
MDC
Symbol
t
MDTKHDX
t
MDHF
1
t
t
Symbol
t
t
TMRCKS
TMRCKH
t
GCLKNV
TMRCK
MDHF
Min
for outputs. For example, t
(first two letters of functional block)(signal)(state)(reference)(state)
t
MDRDXKH
t
MDCR
Typ
Min
0
0
MDKHDX
Max
70
6
Max
10
symbolizes management
Freescale Semiconductor
MHz
Unit
ns
Unit
ns
Notes
Notes
2, 3
2, 3
1
for

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