MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 247
MC68030CRC25C
Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030CRC25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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7
7-86
words latched during the bus cycle. If the cycle is for a data fetch, the bus
error exception is taken immediately. Refer to SECTION 11 INSTRUCTION
When a bus error occurs after the burst mode has been entered (that is, on
the second access or later), the processor terminates the burst operation,
EXECUTION TIMING for more information about pipeline operation.
and the cache entry corresponding to that cycle is marked invalid, but the
processor does not take an exception (see Figure 7-52). If the second cycle
is for a portion of a misaligned operand fetch, the processor runs another
s'z°s'z' ZZX
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AOA3, Z X
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~ _ _ _ /
DER- - ~ _ _ J
RA--¢ J
R,~ - - k
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~ ---k__/
CLK
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Figure 7-51. Late Bus Error
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WRITE WITH BUS E R R O R ASSERTED ~ J - ~ - ~
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MC68030 USER'S MANUAL
Sw
Sw
k_..___/
with STERM - -
X-______/
Sw $3
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f
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Exception Taken
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STACK WRITE
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