MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 432

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MC68030CRC25C

Manufacturer Part Number
MC68030CRC25C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68030CRC25C

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
MOTOROLA
repetition of a calculation that requires them. The processor locates these
transfer. The bytes within the operand are then transferred to or from as-
the operand are transferred to or from ascending addresses beginning with
the location specified by the address register. In this mode, if A7 is used as
the address register and the operand length is one byte, A7 is incremented
words at the current scanPC location and increments the scanPC by two for
dress register used is decremented by the size of the operand before the
cending addresses beginning with the location specified by the decremented
address registerl In this mode, if A7 is used as the address register and the
operand length is one byte, A7 is decremented by two to maintain a word-
aligned stack.
The processor repeats the effective address calculation each time this pri-
each word referenced in the instruction stream.
The MC68030 sign-extends a byte or word-sized operand to a long-word
value when it is transferred to an address register (A0-A7) using this primitive
with the register direct effective addressing mode. A byte or word-sized
operand transferred to a data register (D0-D7) only overwrites the lower byte
or word of the data register.
If the effective addressing mode specifies the predecrement mode, the ad-
For the postincrement effective addressing mode, the address register used
is incremented by the size of the operand after the transfer. The bytes within
by two after the transfer to maintain a word aligned stack. Transferring odd
length operands longer than one byte using the - (A7) or (A7) + addressing
modes
mitive is issued during the execution of a given instruction. The calculation
uses the current contents of any required address and data registers. The
instruction must include a set of effective address extension words for each
can
result in a stack pointer that is not
MC68030 USER'S MANUAL
w o r d
aligned.
10-45
10

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