MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 279

• Manufacturer Part Number: MC68030CRC25C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030CRC25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

8
8.1.7 Trace Exception
8-12
The T1 and TO bits in the supervisor portion of the status register control
tracing. The state of these bits when an instruction begins execution deter-
tion completes. Clearing both T bits disables tracing, and instruction execution
that increment the program counter normally do not take the trace exception.
ception processing before executing the instruction. The processor copies
the status register, enters the supervisor privilege level, and clears the trace
ception vector, and saves the privilege violation vector offset, the current
supervisor stack. The saved value of the program counter is the logical ad-
dress of the first word of the instruction that caused the privilege violation.
To aid in program development, the M68000 processors include instruction-
all instructions or only instructions that change program flow. In the trace
mines whether the instruction generates a trace exception after the instruc~
struction that forces a change of flow to take a trace exception. Instructions
tion traps, returns, and coprocessor instructions that modify the program
counter flow. This mode also includes status register manipulations, because
the processor must re-prefetch instruction words to fill the pipe again any
time an instruction that can modify the status register is executed. The ex-
ecution of the BKPT instruction causes a change of flow if the opcode re-
Exception processing for privilege violations is similar to that for illegal in-
structions. When the processor identifies a privilege violation, it begins ex-
bits. The processor generates vector number 8, the privilege violation ex-
program counter value, and the internal copy of the status register on the
Instruction execution resumes after the required prefetches from the address
in the privilege violation exception vector.
by-instruction tracing capability. The MC68030 can be programmed to trace
mode, an instruction generates a trace exception after it completes execution,
allowing a debugger program to monitor execution of a program.
proceeds normally. Clearing the T1 bit and setting the TO bit causes an in-
Instructions that are traced in this mode include all branches, jumps, instruc-
placing the BKPT is an instruction that causes a change of flow (i.e., a jump,
branch, etc.). Setting the T1 bit and clearing the TO bit causes the execution
of all instructions to force trace exceptions. Table 8-3 shows the trace mode
selected by each combination of T1 and TO.
MC68030 USER'S MANUAL
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