IP-NIOS Altera, IP-NIOS Datasheet - Page 283

• Manufacturer Part Number: IP-NIOS
• Description: IP NIOS II MEGACORE
• Manufacturer: Altera
• Type: Licenser

Specifications of IP-NIOS

• Processor Type: RISC 32-Bit
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Features: -
• Package / Case: -
• Mounting Type: -
• Voltage: -
• Speed: -

Chapter 8: Instruction Set Reference
Instruction Set Reference
subi
December 2010 Altera Corporation
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Pseudo-instruction:
rB ← rA – σ (IMMED)
subi rB, rA, IMMED
subi r8, r8, 4
Sign-extends the immediate value IMMED to 32 bits, subtracts it from the value of rA and then
stores the result in rB.
The maximum allowed value of IMMED is 32768. The minimum allowed value is
–32767.
subi is implemented as addi rB, rA, -IMMED
Nios II Processor Reference Handbook
subtract immediate
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