DP8344BV National Semiconductor, DP8344BV Datasheet - Page 24

• Manufacturer Part Number: DP8344BV
• Description: IC BIPHASE COMM PROCESSR 84-PLCC
• Manufacturer: National Semiconductor

Specifications of DP8344BV

• Processor Type: 8-Bit RISC
• Speed: 20MHz
• Voltage: 4.5 ~ 5.5V
• Mounting Type: Surface Mount
• Package / Case: 84-PLCC
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: *DP8344BV

2 0 CPU Description
mind that the Jcc instruction is just an optional syntax for
the conditional JMP instruction
The example in Figure 2-5 demonstrates two possible ways
to code the conditional relative jump instruction when test-
ing for a false Z flag in CCR
that the symbol ‘‘Z’’ equals ‘‘000’’ binary that the symbol
‘‘NS’’ equals ‘‘0’’ binary and that the symbol ‘‘SKIP IT’’
points to the desired instruction with which to begin execu-
tion if Z is false
Note PC
Note PC
JMP f s n
Jcc n
LJMP Rs p s nn
Syntax
e
Syntax
e
Program Counter contents initially points to instruction following jump
Program Counter
If the flag ‘‘f’’ is in the state ‘‘s’’
If the condition ‘‘cc’’ is met
then PC
then PC
‘‘cc’’ Field
Z
NZ
EQ
NEQ
C
NC
V
NV
N
P
RA
NRA
RE
NRE
DA
NDA
TFF
NTFF
Instruction Operation
If the bit of register ‘‘Rs’’ in
position ‘‘p’’ is in the state ‘‘s’’
(Continued)
‘‘f’’(Binary) Flag
In the example assume
then nn
TABLE 2-14 Conditional Absolute Jump Instruction
a
a
TABLE 2-11 Conditional Relative Jump Instruction
Instruction Operation
000
001
010
011
100
101
110
111
n (sign extended)
n (sign extended)
TABLE 2-13 ‘‘cc’’ Conditions Tested
Zero
Not Zero
Equal
Not Equal
Carry
No Carry
Overflow
No Overflow
Negative
Positive
Receiver Active
Not Receiver Active
Receiver Error
No Receiver Error
Data Available
No Data Available
Transmitter FIFO FULL
Transmitter FIFO Not Full
Condition Tested for
DAV Data Available
PC
TFF Transmitter FIFO Full
RA Receiver Active
RE Receiver Error
N
Z
C
V
TABLE 2-12 ‘‘f’’ Flags
Zero
Carry
Overflow
Negative
Flag Name
PC
PC
24
On the other hand the conditional absolute jump instruc-
tion LJMP can test any bit in any currently active CPU reg-
ister Table 2-14 shows the conditional long jump instruction
syntax
JMP
JNZ
FIGURE 2-5 Coding Examples of Equivalent
Z NS SKIP IT
-or-
SKIP IT
Operand Range
Operand Range
Containing Flag
Flag ‘‘f’’’s Condition
b
b
Z
Z
Z
Z
C
C
V
V
N
N
RA
RA
RE
RE
DAV
DAV
TFF
TFF
128
128
Register
0 64k
Conditional Jump Instructions
CCR
CCR
CCR
CCR
TSR
TSR
TSR
TSR
a
a
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
127
127
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
If Z 0 goto SKIP IT
If Z 0 goto SKIP IT
Addressing Mode
Addressing Mode
Register Absolute
Immediate
Immediate