MMA8205EGR2 Freescale Semiconductor, MMA8205EGR2 Datasheet - Page 25

• Manufacturer Part Number: MMA8205EGR2
• Description: Board Mount Accelerometers X- AXIS 50G SOIC 16
• Manufacturer: Freescale Semiconductor
• Series: MMA82r

Specifications of MMA8205EGR2

• Sensing Axis: X
• Acceleration: 50 g
• Sensitivity: 8.02 mV/g
• Package / Case: SOIC-16
• Axis: X or Y
• Acceleration Range: ±50g
• Voltage - Supply: 6.3 V ~ 30 V
• Output Type: Digital
• Bandwidth: -
• Interface: SPI
• Mounting Type: Surface Mount
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Sensors
Freescale Semiconductor
4.6.4
The Format Control command must be transmitted as a DSI long command structure. No change to the format registers occurs
if the Format Control Command is received within a DSI short command structure.
If this command is sent to the DSI Global Device Address, the format registers are updated, however there is no response.
The Format Control command conforms to the DSI 2.0 Specification.
4.6.4.1
1 - Write Format Control register selected by FA2 - FA0
0 - Read Format Control register unless global command
R/W
D7
FA2
D6
Format Register Read/Write Control Bit (R/W)
Format Control Command
RA3
FA1
0
0
1
1
1
1
1
1
1
1
D5
Register Address
RA2
FA0
1
1
0
0
0
0
1
1
1
1
D4
Data
RA1
FD3
1
1
0
0
1
1
0
0
1
1
D3
RA0
FD2
D2
0
1
0
1
0
1
0
1
0
1
Table 4-16 Format Control Command Structure
FD1
D1
Table 4-15 OTP Field Assignments
B1
0
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
Bank Select
FD0
D0
B0
1
0
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
A3
A3
A2
A2
Address
DEVCFG1[3:0]
DEVCFG1[7:4]
DEVCFG2[3:0]
DEVCFG2[7]
DEVCFG2[5]
DEVCFG2[6]
DEVCFG[4]
REGA[3:0]
REGA[7:4]
REGB[3:0]
REGB[7:4]
REGC[3:0]
REGC[7:4]
REGD[3:0]
REGD[7:4]
REGE[3:0]
REGE[7:4]
REG8[3:0]
REG8[7:4]
REG9[3:0]
REG9[7:4]
REGF[3:0]
REGF[7:4]
Register
A1
A1
A0
A0
C3
1
DSI Bus Device Address
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
Command
C2
0
Definition
LOCK2
GLDE
PAR2
DDIS
C1
1
C0
0
MMA81XXEG
0 to 8 bits
CRC
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