ADAU1361BCPZ Analog Devices Inc, ADAU1361BCPZ Datasheet - Page 53

• Manufacturer Part Number: ADAU1361BCPZ
• Description: IC CODEC 24B PLL 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAU1361BCPZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Voltage - Supply, Analog: 1.8 V ~ 3.6 V
• Voltage - Supply, Digital: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 7
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 101dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

R9: Right Differential Input Volume Control, 16,399 (0x400F)
This register enables the differential path and sets the volume control for the right differential PGA input.
Bit 7
Table 36. Right Differential Input Volume Control Register
Bits
[7:2]
1
0
R10: Record Microphone Bias Control, 16,400 (0x4010)
This register controls the MICBIAS pin settings for biasing electret type analog microphones.
Bit 7
Table 37. Record Microphone Bias Control Register
Bits
3
2
0
Bit Name
MPERF
MBI
MBIEN
Bit Name
RDVOL[5:0]
RDMUTE
RDEN
Bit 6
Bit 6
Right differential input mute control.
Description
Microphone bias is enabled for high performance or normal operation. High performance operation sources
more current to the microphone.
0 = normal operation (default).
1 = high performance.
Microphone voltage bias as a fraction of AVDD.
0 = 0.90 × AVDD (default).
1 = 0.65 × AVDD.
Enables the MICBIAS output.
0 = disabled (default).
1 = enabled.
Description
Right channel differential PGA input volume control. The right differential input uses the RINP (positive signal)
and RINN (negative signal) pins. Each step corresponds to a 0.75 dB increase in gain. See Table 71 for a complete
list of the volume settings.
Setting
000000
000001
…
010000
…
111110
111111
0 = mute (default).
1 = unmute.
Right differential PGA enable. When enabled, the RINP and RINN pins are used as a full differential pair. When
disabled, these two pins are configured as two single-ended inputs with the signals routed around the PGA.
0 = disabled (default).
1 = enabled.
Reserved
Bit 5
Bit 5
RDVOL[5:0]
Bit 4
Bit 4
Volume
−12 dB (default)
−11.25 dB
…
0 dB
…
34.5 dB
35.25 dB
Rev. C | Page 53 of 80
Bit 3
Bit 3
MPERF
Bit 2
Bit 2
MBI
Bit 1
RDMUTE
Bit 1
Reserved
ADAU1361
Bit 0
RDEN
Bit 0
MBIEN