ADAU1361BCPZ Analog Devices Inc, ADAU1361BCPZ Datasheet - Page 70

• Manufacturer Part Number: ADAU1361BCPZ
• Description: IC CODEC 24B PLL 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAU1361BCPZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Voltage - Supply, Analog: 1.8 V ~ 3.6 V
• Voltage - Supply, Digital: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 7
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 101dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1361
R36: DAC Control 0, 16,426 (0x402A)
Bit 7
Table 63. DAC Control 0 Register
Bits
[7:6]
5
2
[1:0]
R37: DAC Control 1, 16,427 (0x402B)
Bit 7
Table 64. DAC Control 1 Register
Bits
[7:0]
DACMONO[1:0]
Bit Name
DACMONO[1:0]
DACPOL
DEMPH
DACEN[1:0]
Bit Name
LDAVOL[7:0]
Bit 6
Bit 6
Description
DAC mono mode. The DAC channels can be set to mono mode within the DAC and output on the left
channel, the right channel, or both channels.
Setting
00
01
10
11
Invert input polarity of the DACs.
0 = normal (default).
1 = inverted.
DAC de-emphasis filter enable. The de-emphasis filter is designed for use with a sampling rate of 44.1 kHz only.
0 = disabled (default).
1 = enabled.
DAC enable.
Setting
00
01
10
11
Description
Controls the digital volume attenuation for left channel inputs from the left DAC. Each bit corresponds to a
0.375 dB step with slewing between settings. See Table 73 for a complete list of the volume settings.
Setting
00000000
00000001
00000010
…
11111110
11111111
Bit 5
DACPOL
Bit 5
Bit 4
Bit 4
Rev. C | Page 70 of 80
Mono Mode
Stereo (default)
Left channel in mono mode
Right channel in mono mode
Both channels in mono mode
DACs Enabled
Both off (default)
Left on
Right on
Both on
Volume Attenuation
0 dB (default)
−0.375 dB
−0.75 dB
…
−95.25 dB
−95.625 dB
LDAVOL[7:0]
Reserved
Bit 3
Bit 3
Bit 2
DEMPH
Bit 2
Bit 1
Bit 1
DACEN[1:0]
Bit 0
Bit 0