KSZ8873MLL Micrel Inc, KSZ8873MLL Datasheet - Page 55
![IC ETHERNET SWITCH 3PORT 64-LQFP](/photos/6/81/68149/64-lqfp-micrel_sml.jpg)
KSZ8873MLL
Manufacturer Part Number
KSZ8873MLL
Description
IC ETHERNET SWITCH 3PORT 64-LQFP
Manufacturer
Micrel Inc
Specifications of KSZ8873MLL
Data Rate
100Mbps
Controller Type
Ethernet Switch Controller
Interface
MII
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
No. Of Ports
3
Ethernet Type
IEEE 802.3u
Supply Current
115mA
Supply Voltage Range
2.5V, 3.3V
Digital Ic Case Style
LQFP
No. Of Pins
64
Svhc
No SVHC (15-Dec-2010)
Base
RoHS Compliant
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Temperature Classification
Commercial
Interface Type
MII, RMII
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3459
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KSZ8873MLL
Manufacturer:
Micrel Inc
Quantity:
1 934
Company:
Part Number:
KSZ8873MLL
Manufacturer:
ADI
Quantity:
27
Company:
Part Number:
KSZ8873MLL AM
Manufacturer:
Micrel
Quantity:
1 638
Company:
Part Number:
KSZ8873MLLJ
Manufacturer:
Micrel
Quantity:
323
Micrel, Inc.
Register 14 (0x0E): Global Control 12
Register 15 (0x0F): Global Control 13
September 2010
Bit
7
6
5
4
3
2-0
Bit
7-3
2-0
Unknown
Packet
Default
Port
Enable
Drive
Strength
of I/O Pad
Reserved
Reserved
Reserved
Packet
Default
Port
PHY
Address
Name
Unknown
Name
Reserved
R/W
R/W
R/W
R/W
RO
R/W
R/W
R/W
R/W
RO
Description
00000 : N/A
00001 : Port 1 PHY address is 0x1
00010 : Port 1 PHY address is 0x2
…
11101 : Port 1 PHY address is 0x29
11110 : N/A
11111 : N/A
Note:
Port 2 PHY address = (Port 1 PHY address) + 1
Reserved
Do not change the default values.
Description
Send packets with unknown destination MAC addresses to specified
port(s) in bits [2:0] of this register.
=0, Disable
=1, Enable
=1, 16mA
=0, 8mA
Reserved
Do not change the default values.
Reserved
Reserved
Do not change the default values.
Specify which port(s) to send packets with unknown destination MAC
addresses. This feature is enabled by bit [7] of this register.
An ‘1’ includes a port.
An ‘0’ excludes a port.
Bit 2 stands for port 3.
Bit 1 stands for port 2.
Bit 0 stands for port 1.
55
KSZ8873MLL/FLL/RLL
Default
00001
000
Default
0
1
0
0
0
111
M9999-092309-1.2