KSZ8873MLL Micrel Inc, KSZ8873MLL Datasheet - Page 60
![IC ETHERNET SWITCH 3PORT 64-LQFP](/photos/6/81/68149/64-lqfp-micrel_sml.jpg)
KSZ8873MLL
Manufacturer Part Number
KSZ8873MLL
Description
IC ETHERNET SWITCH 3PORT 64-LQFP
Manufacturer
Micrel Inc
Specifications of KSZ8873MLL
Data Rate
100Mbps
Controller Type
Ethernet Switch Controller
Interface
MII
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
No. Of Ports
3
Ethernet Type
IEEE 802.3u
Supply Current
115mA
Supply Voltage Range
2.5V, 3.3V
Digital Ic Case Style
LQFP
No. Of Pins
64
Svhc
No SVHC (15-Dec-2010)
Base
RoHS Compliant
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Temperature Classification
Commercial
Interface Type
MII, RMII
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3459
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KSZ8873MLL
Manufacturer:
Micrel Inc
Quantity:
1 934
Company:
Part Number:
KSZ8873MLL
Manufacturer:
ADI
Quantity:
27
Company:
Part Number:
KSZ8873MLL AM
Manufacturer:
Micrel
Quantity:
1 638
Company:
Part Number:
KSZ8873MLLJ
Manufacturer:
Micrel
Quantity:
323
Micrel, Inc.
Register 23[6:0] (0x17): Port 1 Q1 ingress data rate limit
Register 39[6:0] (0x27): Port 2 Q1 ingress data rate limit
Register 55[6:0] (0x37): Port 3 Q1 ingress data rate limit
Register 24[6:0] (0x18): Port 1 Q2 ingress data rate limit
Register 40[6:0] (0x28): Port 2 Q2 ingress data rate limit
Register 56[6:0] (0x38): Port 3 Q2 ingress data rate limit
Register 25[6:0] (0x19): Port 1 Q3 ingress data rate limit
Register 41[6:0] (0x29): Port 2 Q3 ingress data rate limit
Register 57[6:0] (0x39): Port 3 Q3 ingress data rate limit
Note: Most of the contents in registers 26-31 and registers 42-47 for ports 1 and 2, respectively, can also be accessed with the MIIM PHY registers.
September 2010
Bit
7
6-0
Bit
7
6-0
Bit
7
6-0
Reserved
data Rate limit
Reserved
Data Rate limit
Reserved
Data Rate limit
Name
Q1 Ingress
Name
Q2 Ingress
Name
Q3 Ingress
R/W
R/W
R/W
R/W
RO
R/W
R/W
RO
R/W
Description
Reserved
Do not change the default values.
Ingress data rate limit for priority 1 frames
Ingress traffic from this priority queue is shaped according to the
ingress Data Rate Limit Table.
Description
Reserved
Do not change the default values.
Ingress data rate limit for priority 2 frames
Ingress traffic from this priority queue is shaped according to ingress
Data Rate Limit Table.
Description
Reserved
Do not change the default values.
Ingress data rate limit for priority 3 frames
Ingress traffic from this priority queue is shaped according to ingress
Data Rate Limit Table.
60
KSZ8873MLL/FLL/RLL
Default
0
0
Default
0
0
Default
0
0
M9999-092309-1.2