LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 295

• Manufacturer Part Number: LAN9311-NU
• Description: IC ETHER SW 2PRT 16BIT 128-VTQFP
• Manufacturer: SMSC
• Type: Two Port Managed Ethernet Switchr

Specifications of LAN9311-NU

• Controller Type: Ethernet Switch Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: 638-1076 - EVALUATION BOARD LAN9311-NU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1075

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.4.2.5
15:14
BITS
13
12
11
10
9
8
7
6
5
RESERVED
Remote Fault
This bit determines if remote fault indication will be advertised to the link
partner.
0: Remote fault indication not advertised
1: Remote fault indication advertised
RESERVED
Note:
Asymmetric Pause
This bit determines the advertised asymmetric pause capability.
0: No Asymmetric PAUSE toward link partner advertised
1: Asymmetric PAUSE toward link partner advertised
Symmetric Pause
This bit determines the advertised symmetric pause capability.
0: No Symmetric PAUSE toward link partner advertised
1: Symmetric PAUSE toward link partner advertised
RESERVED
100BASE-X Full Duplex
This bit determines the advertised 100BASE-X full duplex capability.
0: 100BASE-X full duplex ability not advertised
1: 100BASE-X full duplex ability advertised
100BASE-X Half Duplex
This bit determines the advertised 100BASE-X half duplex capability.
0: 100BASE-X half duplex ability not advertised
1: 100BASE-X half duplex ability advertised
10BASE-T Full Duplex
This bit determines the advertised 10BASE-T full duplex capability.
0: 10BASE-T full duplex ability not advertised
1: 10BASE-T full duplex ability advertised
10BASE-T Half Duplex
This bit determines the advertised 10BASE-T half duplex capability.
0: 10BASE-T half duplex ability not advertised
1: 10BASE-T half duplex ability advertised
Port x PHY Auto-Negotiation Advertisement Register (PHY_AN_ADV_x)
This read/write register contains the advertised ability of the Port x PHY and is used in the Auto-
Negotiation process with the link partner.
Note: This register is re-written by the EEPROM Loader following the release of reset or a RELOAD
This bit should be written as 0.
command. Refer to
Index (decimal): 4
DESCRIPTION
Section 10.2.4, "EEPROM Loader," on page 150
DATASHEET
295
Size:
16 bits
for additional information.
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
Revision 1.7 (06-29-10)
Note 14.53
Note 14.53
Note 14.54
Note 14.55
Note 14.56
DEFAULT
Table 14.8
Table 14.9
0b
0b
0b
1b
1b
-
-