ISP1160BD01TM ST-Ericsson Inc, ISP1160BD01TM Datasheet - Page 19

IC USB HOST CTRL FULL-SPD 64LQFP

ISP1160BD01TM

Manufacturer Part Number
ISP1160BD01TM
Description
IC USB HOST CTRL FULL-SPD 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1160BD01TM

Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1878-2
ISP1160BD/01,118
ISP1160BD01-T

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1160BD01TM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
ISP1160BD01TM
Manufacturer:
ST
Quantity:
20 000
Philips Semiconductors
9397 750 13963
Product data
Fig 15. ISP1160 HC USB transaction loop.
Initialize
Reset
Entry
HC
USBOperational
HC state =
Description of
1. Reset
2. Initialize HC
3. Entry
4. Need USB traffic
This includes hardware reset by pin RESET_N and software reset by the
HcSoftwareReset command (A9H). The reset function will clear all the HC’s
internal control registers to their reset status. After reset, the HCD must initialize
the ISP1160 USB HC by setting some registers.
It includes:
See also
The normal entry point. The microprocessor returns to this point when there are
HC requests.
USB devices need the HC to generate USB traffic when they have USB traffic
requests such as:
To generate USB traffic, the HCD must enter the USB transaction loop.
a. Setting the physical size for the HC’s internal FIFO buffer RAM by setting the
d. Enabling interrupt events, if required.
g. Setting the HcControl register to move the HC into the USBOperational state.
a. Connecting to or disconnecting from downstream ports
b. Setting the HcHardwareConfiguration register according to requirements.
c. Clearing interrupt events, if required.
e. Setting the HcFmInterval register (0DH to read, 8DH to write).
b. Issuing the Resume signal to the HC.
f. Setting the HC’s Root Hub registers.
HcITLBufferLength register (2AH to read, AAH to write) and the
HcATLBufferLength register (2BH to read, ABH to write).
HC informs HCD of
USB traffic results
USB traffic?
Section
Figure
Need
Exit
Rev. 05 — 24 December 2004
no
15:
9.5.
yes
HC performs USB transactions
Prepare PTD data in
P system RAM
via USB bus I/F
Embedded USB Host Controller
Transfer PTD data into
HC FIFO buffer RAM
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
HC interprets
PTD data
MGT948
ISP1160
18 of 88

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