DP83256VF National Semiconductor, DP83256VF Datasheet - Page 121

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DP83256VF

Manufacturer Part Number
DP83256VF
Description
IC FDDI LAYER CTRLR 160PQFP
Manufacturer
National Semiconductor
Series
PLAYER+™r
Datasheet

Specifications of DP83256VF

Controller Type
physical layer controller
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-
Interface
-
Other names
*DP83256VF
7 0 Electrical Characteristics
AC Characteristics for the Alternate PMD Interface
The following input signals are covered PMD Indicate Data (PMID) Signal Detect (SD) Receive Data In (RXD IN) Receive
Clock In (RXC IN)
The following output signals are covered PMD Request Data (PMRD) Transmit Clock (TXC) Recovered Data Out
(RXD OUT) Recovered Clock Out (RXC OUT)
Note The Alternate PMD Interface is only available on the 160 pin DP83257 PLAYER
enabled by the CGMREG TXCE bit The rest of the Alternate PMD Interface is enabled by the APMDREG APMDEN bit
Note 1 This parameter is not tested but is assured by correlation with characterization data
Symbol
T40
T41
T42
T43
T44
T42
T45
T46
T47
T48
T49
T50
T51
T52
T38
T39
RXC OUT
PMID
RXD IN
RXD IN
TXC
SD Minimum Pulse Width
RXC OUT
RXC OUT
RXC OUT
RXD OUT
RXD OUT
TXC
TXC
TXC
PMRD Rise Time
PMRD Fall Time
a
g
g
g
g
Pulse Width High
Rise Time
Fall Time
to PMRD
to RXD OUT Latency
g
g
a
g
g
g
g
g
to RXC IN
to RXC IN
Pulse Width High
Rise Time
Fall Time
Rise Time
Fall Time
to RXD OUT
g
Parameter
Change Time
a
a
Setup Time
Hold Time
FIGURE 7-11 ECL Rise and Fall Times
g
Change Time
(Continued)
121
Conditions
In Lock
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
a
Device and the 100 pin DP83256-AP Device The Transmit Clock is
Min
120
1 0
4 0
0 5
4 0
3 5
3 5
TL F 11708 – 52
Typ
16
Max
5 0
7 0
4 5
1 5
1 5
1 5
1 5
4 5
1 5
1 5
1 5
1 5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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